Patents by Inventor Hyunjong Shim

Hyunjong Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230407177
    Abstract: An etching gas composition includes at least two C3 or C4 organic fluorine compounds and molybdenum fluoride, and the at least two C3 or C4 organic fluorine compounds are isomers.
    Type: Application
    Filed: June 9, 2023
    Publication date: December 21, 2023
    Inventors: Kyungseok MIN, Hyunjong SHIM, Sangmin MUN, Sunjoo PARK, Hwan JUNG, Nayeon LEE
  • Publication number: 20230313039
    Abstract: An etching gas composition includes at least two types of organofluorine compounds of carbon number C3 or carbon number C4, wherein the at least two types of organofluorine compounds are isomeric to each other.
    Type: Application
    Filed: March 24, 2023
    Publication date: October 5, 2023
    Inventors: Kyungseok MIN, Hyunjong SHIM, Sangmin MUN, Sunjoo PARK, Hwan JUNG, Nayeon LEE
  • Publication number: 20230317435
    Abstract: Provided is a substrate processing apparatus including a chamber having a processing space therein, a supporting unit arranged in the processing space, having a substrate located thereon, and including a label material layer including a label material therein, a plasma source configured to generate plasma from a processing gas in the processing space, and a measurement apparatus configured to detect the label material, wherein, when the supporting unit is etched to a depth that is greater than or equal to a first depth, the label material layer is exposed.
    Type: Application
    Filed: February 23, 2023
    Publication date: October 5, 2023
    Inventors: Sunjoo PARK, Hyunjong SHIM, Sangmin MUN, Kyungseok MIN, Hwan JUNG, Nayeon LEE
  • Patent number: 10431458
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: October 1, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyunjong Shim, Merrett Wong
  • Publication number: 20170076945
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.
    Type: Application
    Filed: November 22, 2016
    Publication date: March 16, 2017
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyunjong Shim, Merrett Wong
  • Patent number: 9543148
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: January 10, 2017
    Assignee: Lam Research Corporation
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyunjong Shim, Merrett Wong
  • Publication number: 20080023144
    Abstract: In at least some embodiments, a plasma etch tool is provided which includes a processing chamber capable of receiving a workpiece. The plasma etch tool is configured to generate a high density and low bombardment energy plasma therein from a gas mixture which includes CF4, N2 and Ar, for processing the workpiece. The high density and low bombardment energy plasma is formed by using high source and low bias power settings. The density or electron density, can, depending on the embodiment, range from about 5×1010 electrons/cm3 and above, including about 1×1011 electrons/cm3 and above. The gas mixture can further include H2, NH3, a hydrofluorocarbon gas and/or a fluorocarbon gas.
    Type: Application
    Filed: July 15, 2007
    Publication date: January 31, 2008
    Inventors: Gerardo Delgadino, Chang-Lin Hsieh, Yan Ye, Hyunjong Shim
  • Publication number: 20060118519
    Abstract: In at least some embodiments, the present invention is a plasma etching method which includes applying a gas mixture comprising CF4, N2 and Ar and forming a high density and low bombardment energy plasma. The high density and low bombardment energy plasma is formed by using high source and low bias power settings. The gas mixture can further include H2, NH3, a hydrofluorocarbon gas and/or a fluorocarbon gas. The hydrofluorocarbon gas can include CH2F2, CH3F; and/or CHF3. The fluorocarbon gas can include C4F8, C4F6 and/or C5F8.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 8, 2006
    Inventors: Gerardo Delgadino, Chang-Lin Hsieh, Yan Ye, Hyunjong Shim