Abstract: Disclosed is a memory device which receives a check command and check information from a Central Processing Unit (CPU), reads data written in a predetermined area of a memory based on the check information in response to the check command, and checks a data pattern of the data read based on the check information.

Abstract: A solid-state mass storage device for use with host computer systems, and methods of increasing the endurance of non-volatile memory components thereof that define a first non-volatile memory space. The mass storage device further has a second non-volatile memory space containing at least one non-volatile memory component having a higher write endurance than the memory components of the first non-volatile memory space. The second non-volatile memory space functions as a low-pass filter for host writes to the first non-volatile memory space to minimize read accesses to the first non-volatile memory space. Contents of the second non-volatile memory space are managed using a change counter.

Abstract: Provided is a memory controller that generates Error Correction Code (ECC) information for data based on a required reliability level predetermined based on a type of the data, that computes an ECC code for the data based on the ECC information, and that records the ECC code in a memory based on the ECC information.

Abstract: Provided are a storage system for supporting a copy command and a move command and an operation method of said storage system. The storage system performs a copy operation and a move operation without movement of data between a host and a storage device, by using a copy command and a move command which are distinguished from a read command and a write command. More specifically, the storage device updates a mapping table by responding to the reception of the copy command or the move command from the host.

Abstract: Provided are: a storage device for adaptively determining a processing technique with respect to a host request based on partition data; and an operating method for the storage device. The storage device responds to receipt of a read or write request from a host by ascertaining a partition corresponding to the host request based on data about block addresses occupied by various partitions stored in the storage device. Also, the storage device adaptively determines a processing technique with respect to the host request based on predetermined attributes of the partition concerned.

Abstract: Non-volatile solid-state memory-based storage devices and methods of operating the storage devices to have low initial error rates. The storage devices and methods use bit error rate comparison of duplicate writes to one or more non-volatile memory devices. The data set with a lower bit error rate as determined during verification is maintained, whereas data sets with higher bit error rates are discarded. A threshold of bit error rates can be used to trigger the duplication of data for bit error comparison.

Abstract: Disclosed is a memory device which receives a check command and check information from a Central Processing Unit (CPU), reads data written in a predetermined area of a memory based on the check information in response to the check command, and checks a data pattern of the data read based on the check information.

Abstract: Provided is a memory controller that generates Error Correction Code (ECC) information for data based on a required reliability level predetermined based on a type of the data, that computes an ECC code for the data based on the ECC information, and that records the ECC code in a memory based on the ECC information.

Abstract: A run level address mapping table and related method provides for storing address mapping data, which maps logical addresses to physical addresses in a flash memory using a flash translation layer. A first value is stored in the address mapping table, indicating an initial location for a run within a memory block, the run having at least two consecutive physical addresses. A second value is stored in the address mapping table, indicating a total size for the run.

Abstract: A data management apparatus and method used in a system using one or more flash memories, which can deal with defective blocks in each of the flash memories using different methods depending on how the system manages data stored in each of the flash memories. The data management apparatus includes a device driver, which controls the operation of one or more flash memories, and a controller, which transfers data stored in a defective block of one of the flash memories to a predetermined block in the flash memory.

Abstract: A run level address mapping table and related method of construction is disclosed. The address mapping table is constructed on a run basis, e.g., a group of consecutive pages having consecutive logical or physical addresses. The run level address mapping table stores only an initial physical page number of each run and the number of the consecutive physical pages.

Abstract: Integrated circuit devices that support error detection include a non-volatile memory device having a memory array therein containing a plurality of pages of memory cells. A memory controller is also provided. The memory controller is electrically coupled to the non-volatile memory device and is configured to provide the non-volatile memory device with a plurality of segments of page data during a page write operation. The plurality of segments of page data include a plurality of segments of checksum data that identify a number of non-volatile memory cells to be programmed with write data during the page write operation. Additional checksum data is also generated for comparison and error detection purposes during a page read operation.

Abstract: A data management apparatus and method used for a flash memory are provided. The data management apparatus and method can prevent waste of memory space and deterioration of the performance of a flash memory caused by a difference between logical and physical operation units of the flash memory. The data management apparatus copies data stored in a physical block to which a data operation is to be performed to the internal memory, performs the data operation on the internal memory, and transfers the data to the physical block.

Abstract: A data management apparatus and method used in a system using one or more flash memories, which can deal with defective blocks in each of the flash memories using different methods depending on how the system manages data stored in each of the flash memories. The data management apparatus includes a device driver, which controls the operation of one or more flash memories, and a controller, which transfers data stored in a defective block of one of the flash memories to a predetermined block in the flash memory.