Patents by Inventor Hyun-Su Ju

Hyun-Su Ju has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9812501
    Abstract: A variable resistance memory device includes a plurality of first conductive layer pattern, a plurality of second conductive layer patterns over the first conductive layer patterns, and a plurality of lower cell structures including a switching element and a variable resistance element, the lower cell structures being formed at intersections at which the first conductive layer patterns and the second conductive layer patterns overlap each other. The first conductive layer patterns, the second conductive layer patterns and the lower cell structures serves as one of a memory cell, a first dummy pattern structure and a second dummy pattern structure.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: November 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Woo Lee, Youn-Seon Kang, Seung-Jae Jung, Hyun-Su Ju, Masayuki Terai
  • Patent number: 9431458
    Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: August 30, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Woo Lee, Youn-Seon Kang, Jung-Moo Lee, Seung-Jae Jung, Hyun-Su Ju
  • Publication number: 20160197121
    Abstract: A variable resistance memory device includes a plurality of first conductive layer pattern, a plurality of second conductive layer patterns over the first conductive layer patterns, and a plurality of lower cell structures including a switching element and a variable resistance element, the lower cell structures being formed at intersections at which the first conductive layer patterns and the second conductive layer patterns overlap each other. The first conductive layer patterns, the second conductive layer patterns and the lower cell structures serves as one of a memory cell, a first dummy pattern structure and a second dummy pattern structure.
    Type: Application
    Filed: December 30, 2015
    Publication date: July 7, 2016
    Inventors: Jin-Woo LEE, Youn-Sean KANG, Seung-Jae JUNG, Hyun-Su JU, Masayuki TERAI
  • Publication number: 20160148977
    Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.
    Type: Application
    Filed: December 28, 2015
    Publication date: May 26, 2016
    Inventors: JIN-WOO LEE, YOUN-SEON KANG, JUNG-MOO LEE, SEUNG-JAE JUNG, HYUN-SU JU
  • Patent number: 9343672
    Abstract: A nonvolatile memory cell includes first and second interlayer insulating films which are separated from each other and are stacked sequentially, a first electrode which penetrates the first interlayer insulating film and the second interlayer insulating film, a resistance change film which is formed along a side surface of the first electrode and extends parallel to the first electrode, and a second electrode which is formed between the first interlayer insulating film and the second interlayer insulating film. The second electrode includes a conductive film which is made of metal and a diffusion preventing film which prevents diffusion of a conductive material contained in the conductive film.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: May 17, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Jin Park, Sun-Jung Kim, Soon-Oh Park, Hyun-Su Ju, Soo-Doo Chae
  • Patent number: 9293700
    Abstract: According to example embodiments, a nonvolatile memory cell includes a first electrode and a second electrode, a resistance change film between the first electrode and the second electrode, and a first barrier film contacting the second electrode. The resist change film contains oxygen ions and contacts the first electrode. The first barrier film is configured to reduce (and/or block) the outflow of the oxygen ions from the resistance change film.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: March 22, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Su Ju, Min-Kyu Yang, Eun-Mi Kim, Seong-Geon Park
  • Patent number: 9269746
    Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: February 23, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Woo Lee, Youn-Seon Kang, Jung-Moo Lee, Seung-Jae Jung, Hyun-Su Ju
  • Publication number: 20150129824
    Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.
    Type: Application
    Filed: July 3, 2014
    Publication date: May 14, 2015
    Inventors: JIN-WOO LEE, YOUN-SEON KANG, JUNG-MOO LEE, SEUNG-JAE JUNG, HYUN-SU JU
  • Patent number: 8884262
    Abstract: A non-volatile memory device is provided wherein a lower molding layer is formed on a substrate; a first horizontal interconnection is formed on the lower molding layer; an upper molding layer is formed on the first horizontal interconnection; a pillar is formed connected to the substrate by vertically passing through the upper molding layer, the first horizontal interconnection and the lower molding layer. The pillar has a lower part and an upper part, wherein the lower part is disposed on the same level as the first horizontal interconnection and has a first width and the upper part is disposed on a higher level than the first horizontal interconnection and has a second width different from the first width.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: November 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Su Ju, Sun-Jung Kim, Soo-Doo Chae
  • Publication number: 20140291605
    Abstract: According to example embodiments, a nonvolatile memory cell includes a first electrode and a second electrode, a resistance change film between the first electrode and the second electrode, and a first barrier film contacting the second electrode. The resist change film contains oxygen ions and contacts the first electrode. The first barrier film is configured to reduce (and/or block) the outflow of the oxygen ions from the resistance change film.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Inventors: Hyun-Su JU, Min-Kyu YANG, Eun-Mi KIM, Seong-Geon PARK
  • Patent number: 8785899
    Abstract: According to example embodiments, a nonvolatile memory cell includes a first electrode and a second electrode, a resistance change film between the first electrode and the second electrode, and a first barrier film contacting the second electrode. The resist change film contains oxygen ions and contacts the first electrode. The first barrier film is configured to reduce (and/or block) the outflow of the oxygen ions from the resistance change film.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: July 22, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Hyun-Su Ju, Min-Kyu Yang, Eun-Mi Kim, Seong-Geon Park
  • Patent number: 8525247
    Abstract: A non-volatile memory device includes a lower molding layer, a horizontal interconnection line on the lower molding layer, an upper molding layer on the horizontal interconnection line, pillars extending vertically through the upper molding layer, the horizontal interconnection line, and the lower molding layer, and a buffer layer interposed between the pillars and the molding layers. The device also includes variable resistance material and a diode layer interposed between the pillars and the horizontal interconnection line.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: September 3, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Jin Park, Hyun-Su Ju, In-Gyu Baek
  • Publication number: 20130200326
    Abstract: According to example embodiments, a nonvolatile memory cell includes a first electrode and a second electrode, a resistance change film between the first electrode and the second electrode, and a first barrier film contacting the second electrode. The resist change film contains oxygen ions and contacts the first electrode. The first barrier film is configured to reduce (and/or block) the outflow of the oxygen ions from the resistance change film.
    Type: Application
    Filed: August 16, 2012
    Publication date: August 8, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Su JU, Min-Kyu YANG, Eun-Mi KIM, Seong-Geon PARK
  • Publication number: 20130009122
    Abstract: A non-volatile memory device includes a lower molding layer, a horizontal interconnection line on the lower molding layer, an upper molding layer on the horizontal interconnection line, pillars extending vertically through the upper molding layer, the horizontal interconnection line, and the lower molding layer, and a buffer layer interposed between the pillars and the molding layers. The device also includes variable resistance material and a diode layer interposed between the pillars and the horizontal interconnection line.
    Type: Application
    Filed: May 3, 2012
    Publication date: January 10, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: CHAN-JIN PARK, HYUN-SU JU, IN-GYU BAEK
  • Publication number: 20120313066
    Abstract: A nonvolatile memory cell includes first and second interlayer insulating films which are separated from each other and are stacked sequentially, a first electrode which penetrates the first interlayer insulating film and the second interlayer insulating film, a resistance change film which is formed along a side surface of the first electrode and extends parallel to the first electrode, and a second electrode which is formed between the first interlayer insulating film and the second interlayer insulating film. The second electrode includes a conductive film which is made of metal and a diffusion preventing film which prevents diffusion of a conductive material contained in the conductive film.
    Type: Application
    Filed: April 9, 2012
    Publication date: December 13, 2012
    Inventors: Chan-Jin Park, Sun-Jung Kim, Soon-Oh Park, Hyun-Su Ju, Soo-Doo Chae
  • Publication number: 20120305877
    Abstract: A non-volatile memory device is provided wherein a lower molding layer is formed on a substrate; a first horizontal interconnection is formed on the lower molding layer; an upper molding layer is formed on the first horizontal interconnection; a pillar is formed connected to the substrate by vertically passing through the upper molding layer, the first horizontal interconnection and the lower molding layer. The pillar has a lower part and an upper part, wherein the lower part is disposed on the same level as the first horizontal interconnection and has a first width and the upper part is disposed on a higher level than the first horizontal interconnection and has a second width different from the first width.
    Type: Application
    Filed: June 4, 2012
    Publication date: December 6, 2012
    Inventors: Hyun-Su Ju, Sun-Jung Kim, Soo-Doo Chae