Abstract: A gripper includes a body part, a finger base part coupled to the body part, and a finger part coupled to a first side of the body part or the finger base part and coupled to the body part or the finger base part to be reciprocal, wherein the finger part comprises a first link structure and a second link structure, sides of which are coupled to the finger base part, respectively, and wherein, in the first link structure and the second link structure, a first support area of the first link structure and a second support area of the second link structure reciprocate in only one of a plurality of directions that cross a direction in which the finger part reciprocates with respect to the finger base part.

Abstract: A gripper includes a body part, a finger base part coupled to the body part to be rotatable, the finger base part including a first finger base part and a second finger base part configured such that when the first finger base part is rotated in a first direction with respect to the body part, the second finger base part is provided to be rotatable in a second direction opposite the first direction with respect to the body part, and a finger part coupled to a first side of the body part or the finger base part to be reciprocal.

Abstract: An embodiment device includes an input module including a motor configured to generate a rotational force, an output module configured to receive power from the input module to be rotatable, and a connection module having a first side coupled to the input module and a second side, opposite the first side, coupled to the output module, wherein the connection module is configured to transmit the power from the input module to the output module.

Abstract: A display apparatus including a display and a supporter. The supporter being mounted on the display and configured to support the display and rotate the display module between a first position and a second position. The supporter including a drive motor, a first gear, and a detection sensor. The drive motor configured to supply a driving force to rotate the display. The first gear configured to rotate together with the display by receiving the driving force from the drive motor. The detection sensor configured to detect a rotation amount of a second gear configured to rotate in with the first gear.

Abstract: A semiconductor device includes a usable address storage unit for selectively storing addresses of a plurality of memory sets using read data of the plurality of memory sets outputted from a nonvolatile memory during a boot-up operation; a register unit for storing the read data of the plurality of memory sets outputted from the nonvolatile memory during the boot-up operation; and an internal circuit for operating by using the read data of the plurality of memory sets stored in the register unit. Addresses corresponding to usable memory sets excluding already-used memory sets and defective memory sets among the memory sets of the nonvolatile memory are extracted and stored, and thus, although an address is not separately inputted when the nonvolatile memory is programmed, data may be programmed in a programmable (usable) memory set.

Abstract: A semiconductor device includes a boot-up signal generator suitable for generating a boot-up signal based on an external reset signal and a specific mode signal; and an internal circuit suitable for performing a boot-up operation based on the boot-up signal.

Abstract: Provided herein is a semiconductor device including first and second regulators suitable for respectively generating first and second regulating voltages; first and second planes; a first peripheral circuit suitable for operating the first plane using the first regulating voltage; and a second peripheral circuit suitable for operating the second plane using the second regulating voltage, wherein the first regulator further provides a first reference voltage to the second regulator, and wherein the second regulator generates the second regulating voltage based on the first reference voltage.

Abstract: A nonvolatile memory includes a plurality of memory sets, wherein each of the memory sets includes a fir memory cell suitable for storing validity signal indicating data validity of the corresponding memory set, and second memory cells suitable for storing multi-bit data or one or more-bit defect information.

Abstract: A nonvolatile memory includes a plurality of memory sets, wherein each of the memory sets includes a first memory cell suitable for storing a validity signal indicating data validity of the corresponding memory set, and second memory cells suitable for storing multi-bit data or one or more-bit defect information.

Abstract: A fuse array circuit includes a power generation block suitable for generating a driving power to be level-shifted at least once in a read operation period, a word line driving block suitable for driving a word line by using the driving power, and a fuse array suitable for outputting information programmed in a fuse that is activated by the driven word line through a bit line.

Abstract: A semiconductor device includes a boot-up signal generator suitable for generating a boot-up signal based on an external reset signal and a specific mode signal; and an internal circuit suitable for performing a boot-up operation based on the boot-up signals

Abstract: A one-time programmable memory includes a first cell array including a plurality of one-time programmable memory cells, and a second cell array including a plurality of one-time programmable memory cells, wherein the first cell array and the second cell array are programmed separately during a program operation, and read in combination during a read operation.

Abstract: A one-time programmable memory includes a first cell array including a plurality of one-time programmable memory cells, and a second cell array including a plurality of one-time programmable memory cells, wherein the first cell array and the second cell array are programmed separately during a program operation, and read in combination during a read operation.

Abstract: Provided is a semiconductor system and method for repairing the same that may improve repair capacity of the semiconductor system. The semiconductor system comprises a semiconductor circuit configured to output a remaining repair information and perform a repair operation in response to an external command, and a host configured to determine a number of available repairs based on the remaining repair information and provide the semiconductor circuit with the external command based on the number of available repairs.

Abstract: A communication terminal and a driving method thereof are provided. The driving method of a communication terminal includes: forming a transmitting path and an absorption path by controlling a time division duplex (TDD) switch in a transmitting mode to isolate the transmitting path and the receiving path from an absorption path, the transmitting path transmitting a transmitting signal in a wireless scheme, and the absorption path diverged from the transmitting path through a circulator of the TDD switch to block a reflecting signal in the transmitting signal reversely transferred to the transmitting path; processing the transmitting signal through the transmitting path. Because a TDD switch has an isolation function, insertion loss in a transmitting path may be suppressed.

Abstract: Provided is a semiconductor system and method for repairing the same that may improve repair capacity of the semiconductor system. The semiconductor system comprises a semiconductor circuit configured to output a remaining repair information and perform a repair operation in response to an external command, and a host configured to determine a number of available repairs based on the remaining repair information and provide the semiconductor circuit with the external command based on the number of available repairs.

Abstract: A pipe register circuit includes an address storage section configured to temporarily and sequentially store address signals input from an external in correspondence with a read command signal input together with the address signals, and an address output control section configured to generate an address output control signal for allowing the address signals stored in the address storage section to be output in correspondence with CAS latency, and output the address output control signal to the address storage section.

Abstract: A nonvolatile memory includes a plurality of memory sets, wherein each of the memory sets includes a first memory cell suitable for storing a validity signal indicating data validity of the corresponding memory set, and second memory cells suitable for storing multi-bit data or one or more-bit defect information.

Abstract: An operating method of a memory device includes entering a repair mode, receiving an active command and a fail address, and temporarily storing the received command and address, receiving a write command, and determining whether to perform a program operation, when the program operation is determined to be performed, programming the temporarily-stored fail address into a programmable storage unit, and receiving a precharge command before the programming of the temporarily-stored fail address is completed.

Abstract: An operating method of a memory device includes entering a repair mode, receiving an active command and a fail address, and temporarily storing the received command and address, receiving a write command, and determining whether to perform a program operation, when the program operation is determined to be performed, programming the temporarily-stored fail address into a programmable storage unit, and receiving a precharge command before the programming of the temporarily-stored fail address is completed.