Abstract: A method for periodically activating a battery unit applied to an electronic device equipped with the battery unit includes steps as follows. A plurality of intervals are defined, wherein each of the intervals has an initial voltage value and a target voltage value, and the initial voltage value is greater than the target voltage value. An activation strategy for each of the intervals is defined. A voltage value of the battery unit is detected. One of the intervals is selected as a selected interval according to the voltage value of the battery unit, wherein the voltage value of the battery unit is less than or equal to the initial voltage value of the selected interval, and the voltage value of the battery unit is greater than the target voltage value of the selected interval. The battery unit is activated according to the activation strategy of the selected interval.

Abstract: A lock device includes a shell, a bolt mechanism, a magnetic member, and a magnetic sensing module. The magnetic member is movable with the bolt mechanism. When the bolt mechanism is moved between a locking position and an unlocking position, the magnetic sensing module senses a magnetic force variation of the magnetic member. The lock device further includes a magnetic force generation member disposed on a wall. When a door located at a door-closed position with the bolt mechanism being moved to the locking position is shaken relative to the wall, the magnetic sensing module senses a magnetic force variation of the magnetic force generation member.

Abstract: An electric lock includes a fingerprint module and a control circuit. The fingerprint module includes a fingerprint sensing unit configured to sense a fingerprint image of a user, and a fingerprint recognition unit electrically connected to the fingerprint sensing unit and configured to compare the fingerprint image of the user with registered fingerprint data pre-stored in the fingerprint recognition unit to generate a comparison result. The control circuit is electrically connected to the fingerprint recognition unit, and configured to control the electric lock to perform a predetermined operation according to the comparison result. The fingerprint sensing unit and the fingerprint recognition unit are integrated and packaged in a same chip, and the comparison result is transmitted from the fingerprint recognition unit to the control circuit after being encrypted according to a predetermined encryption method.

Abstract: An electric lock includes a motor, a power input port, a first control system and a second control system. The first control system includes an input unit configured to receive input data, an internal power source, and a first processing unit configured to use electricity of the internal power source to control the motor to rotate according to the input data. The second control system includes a wireless unit configured to receive a wireless signal, and a second processing unit different from the first processing unit and configured to use electricity of an external power source to control the motor to rotate when data transmitted in the wireless signal matches predetermined data and when the power input port is electrically connected to the external power source.

Abstract: An electric lock includes a fingerprint module and a control circuit. The fingerprint module includes a fingerprint sensing unit configured to sense a fingerprint image of a user, and a fingerprint recognition unit electrically connected to the fingerprint sensing unit and configured to compare the fingerprint image of the user with registered fingerprint data pre-stored in the fingerprint recognition unit to generate a comparison result. The control circuit is electrically connected to the fingerprint recognition unit, and configured to control the electric lock to perform a predetermined operation according to the comparison result. The fingerprint sensing unit and the fingerprint recognition unit are integrated and packaged in a same chip, and the comparison result is transmitted from the fingerprint recognition unit to the control circuit after being encrypted according to a predetermined encryption method.

Abstract: An electric lock includes a motor, a power input port, a first control system and a second control system. The first control system includes an input unit configured to receive anput data, an internal power source, and a first processing unit configured to use electricity of the internal power source to control the motor to rotate according to the input data. The second control system includes a wireless unit configured to receive a wireless signal, and a second processing unit different from the first processing unit and configured to use electricity of an external power source to control the motor to rotate when data transmitted in the wireless signal matches predetermined data and when the power input port is electrically connected to the external power source.

Abstract: A control method for operating an electric lock by using a portable device includes the portable device obtaining an encrypted message according to an encryption function; the portable device transmitting the encrypted message to the electric lock; the electric lock decrypting the encrypted message according to a decryption function; and the electric lock determining whether to perform an action according to a decryption result of the encrypted message.

Abstract: A control method for operating an electric lock by using a portable device includes the portable device obtaining an encrypted message according to an encryption function; the portable device transmitting the encrypted message to the electric lock; the electric lock decrypting the encrypted message according to a decryption function; and the electric lock determining whether to perform an action according to a decryption result of the encrypted message.

Abstract: The present disclosure provides a method. The method includes obtaining an integrated circuit (IC) layout. The method includes providing a polishing process simulation model. The method includes performing a lithography pattern check (LPC) process to the IC layout. The LPC process is performed at least in part using the polishing process simulation model. The method includes detecting, in response to the LPC process, possible problem areas on the IC layout. The method includes modifying the polishing process simulation model. The method includes repeating the performing the LPC process and the detecting the possible problem areas using the modified polishing process simulation model.

Abstract: A method and computer program are provided for analyzing a set of layers within an integrated circuit design to determine a set of critical points for each layer within the set of layers. The critical points are based at least in part on manufacturer specific process parameters. The method includes assigning a critical point value to each of the critical points within each set of critical points, analyzing a path through the integrated circuit design across multiple integrated circuit design layers, and determining a sum of critical point values of each critical point along the path.

Abstract: According to an exemplary embodiment, a method of forming a substrate pattern having an isolated region and a dense region is provided. The method includes the following operations: forming a first photoresist layer over the substrate; exposing the first photoresist layer through a first mask corresponding to the isolated region; developing the first photoresist layer to form a first pattern; forming a second photoresist layer over the substrate and the first pattern; exposing the second photoresist layer through a second mask corresponding to the substrate pattern; developing the second photoresist layer to form a second pattern; and etching the first pattern and the substrate to form the substrate pattern in the isolated region and the dense region.

Abstract: According to an exemplary embodiment, a method of forming a substrate pattern having an isolated region and a dense region is provided. The method includes the following operations: forming a first photoresist layer over the substrate; exposing the first photoresist layer through a first mask corresponding to the isolated region; developing the first photoresist layer to form a first pattern; forming a second photoresist layer over the substrate and the first pattern; exposing the second photoresist layer through a second mask corresponding to the substrate pattern; developing the second photoresist layer to form a second pattern; and etching the first pattern and the substrate to form the substrate pattern in the isolated region and the dense region.

Abstract: A method and computer program are provided for analyzing a set of layers within an integrated circuit design to determine a set of critical points for each layer within the set of layers. The critical points are based at least in part on manufacturer specific process parameters. The method includes assigning a critical point value to each of the critical points within each set of critical points, analyzing a path through the integrated circuit design across multiple integrated circuit design layers, and determining a sum of critical point values of each critical point along the path.

Abstract: A method for characterizing a three-dimensional surface profile of a semiconductor workpiece is provided. In this method, the three-dimensional surface profile is imaged from a normal angle to measure widths of various surfaces in a first image. The three-dimensional surface is also imaged from a first oblique angle to re-measure the widths of the various surfaces in a second image. Based on differences in widths of corresponding surfaces for first and second images, a feature height and sidewall angle are determined for the three-dimensional profile.

Abstract: Integrated circuit design techniques are disclosed. In some methods, a target layout design having a geometric pattern thereon is received. A set of fast-bias contour (FBC) rules is applied to the target layout design to provide an electronic photomask having FBC-edits. The FBC-edits differentiate the electronic photomask from the target layout design, and the FBC rules are applied without previously applying optical proximity correction (OPC) to the target layout design. A lithography process check is performed on the electronic photomask to determine whether a patterned integrated circuit layer, which is to be manufactured based on the electronic photomask, is expected to be in conformance with the geometric pattern of the target layout design.

Abstract: The present disclosure provides a method. The method includes obtaining an integrated circuit (IC) layout. The method includes providing a polishing process simulation model. The method includes performing a lithography pattern check (LPC) process to the IC layout. The LPC process is performed at least in part using the polishing process simulation model. The method includes detecting, in response to the LPC process, possible problem areas on the IC layout. The method includes modifying the polishing process simulation model. The method includes repeating the performing the LPC process and the detecting the possible problem areas using the modified polishing process simulation model.