Patents by Inventor I-Cheng Chang

I-Cheng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250089265
    Abstract: A ferroelectric random access memory (FeRAM) cell may include an oxide insertion layer between the electron barrier layer and the metal glue layer of the source/drain regions of the FeRAM cell. The oxide insertion layer may improve the thermal stability of the electron barrier layer and minimize or prevent dissociation and/or out-diffusion of the electron barrier layer at high processing temperatures. Thus, the oxide insertion layer may enable the metal glue layer to be formed over the electron barrier layer with low surface roughness, which may enable increased adhesion between the metal glue layer and the source/drain electrodes of the source/drain regions. In this way, the oxide insertion layer may enable low electrical resistance to be achieved for the FeRAM cell and/or may reduce the likelihood of failures in the FeRAM cell, among other examples.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 13, 2025
    Inventors: Ya-Ling LEE, I-Cheng CHANG, Yen-Chieh HUANG, I-Chee LEE
  • Publication number: 20240387169
    Abstract: A method for forming a semiconductor device is provided.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Chieh Huang, I-Cheng Chang, Kai-Wen Cheng, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240162318
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Application
    Filed: January 26, 2024
    Publication date: May 16, 2024
    Inventors: Min-Kun DAI, Wei-Gang CHIU, I-Cheng CHANG, Cheng-Yi WU, Han-Ting TSAI, Tsann LIN, Chung-Te LIN
  • Patent number: 11935935
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Kun Dai, Wei-Gang Chiu, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin
  • Patent number: 11837667
    Abstract: A planar insulating spacer layer is formed over a substrate, and a vertical stack of a gate electrode, a gate dielectric layer, and a first semiconducting metal oxide layer may be formed thereabove. The first semiconducting metal oxide layer includes atoms of a first n-type dopant at a first average dopant concentration. A second semiconducting metal oxide layer is formed over the first semiconducting metal oxide layer. Portions of the second semiconducting metal oxide layer are doped with the second n-type dopant to provide a source-side n-doped region and a drain-side n-doped region that include atoms of the second n-type dopant at a second average dopant concentration that is greater than the first average dopant concentration. Various dopants may be introduced to enhance performance of the thin film transistor.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: December 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Kun Dai, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin, Wei-Gang Chiu
  • Publication number: 20230019001
    Abstract: The present disclosure provides a method for characterizing magnetic properties of a target layer, including providing a first sample having a first structure, providing a second sample having a target layer over the first structure, obtaining a first magnetic property of the first sample, obtaining a second magnetic property of the second sample, and deriving a third magnetic property of the target layer according to the first magnetic property and the second magnetic property.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Inventors: I CHENG CHANG, TSANN LIN
  • Publication number: 20220352333
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Application
    Filed: November 11, 2021
    Publication date: November 3, 2022
    Inventors: Min-Kun DAI, Wei-Gang CHIU, I-Cheng CHANG, Cheng-Yi WU, Han-Ting TSAI, Tsann LIN, Chung-Te LIN
  • Publication number: 20220336671
    Abstract: A planar insulating spacer layer is formed over a substrate, and a vertical stack of a gate electrode, a gate dielectric layer, and a first semiconducting metal oxide layer may be formed thereabove. The first semiconducting metal oxide layer includes atoms of a first n-type dopant at a first average dopant concentration. A second semiconducting metal oxide layer is formed over the first semiconducting metal oxide layer. Portions of the second semiconducting metal oxide layer are doped with the second n-type dopant to provide a source-side n-doped region and a drain-side n-doped region that include atoms of the second n-type dopant at a second average dopant concentration that is greater than the first average dopant concentration. Various dopants may be introduced to enhance performance of the thin film transistor.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 20, 2022
    Inventors: Min-Kun Dai, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin, Wei-Gang Chiu
  • Publication number: 20220254930
    Abstract: A planar insulating spacer layer is formed over a substrate, and a vertical stack of a gate electrode, a gate dielectric layer, and a first semiconducting metal oxide layer may be formed thereabove. The first semiconducting metal oxide layer includes atoms of a first n-type dopant at a first average dopant concentration. A second semiconducting metal oxide layer is formed over the first semiconducting metal oxide layer. Portions of the second semiconducting metal oxide layer are doped with the second n-type dopant to provide a source-side n-doped region and a drain-side n-doped region that include atoms of the second n-type dopant at a second average dopant concentration that is greater than the first average dopant concentration. Various dopants may be introduced to enhance performance of the thin film transistor.
    Type: Application
    Filed: February 11, 2021
    Publication date: August 11, 2022
    Inventors: Min-Kun DAI, I-Cheng CHANG, Cheng-Yi WU, Han-Ting TSAI, Tsann LIN, Chung-Te LIN, Wei-Gang CHIU
  • Patent number: 11404586
    Abstract: A planar insulating spacer layer is formed over a substrate, and a vertical stack of a gate electrode, a gate dielectric layer, and a first semiconducting metal oxide layer may be formed thereabove. The first semiconducting metal oxide layer includes atoms of a first n-type dopant at a first average dopant concentration. A second semiconducting metal oxide layer is formed over the first semiconducting metal oxide layer. Portions of the second semiconducting metal oxide layer are doped with the second n-type dopant to provide a source-side n-doped region and a drain-side n-doped region that include atoms of the second n-type dopant at a second average dopant concentration that is greater than the first average dopant concentration. Various dopants may be introduced to enhance performance of the thin film transistor.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: August 2, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Kun Dai, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin, Wei-Gang Chiu
  • Patent number: 7415151
    Abstract: A method of acquiring 3D color information and a 3D color information acquisition apparatus, suitable for obtaining a 3D model of an object, use a pattern light source to acquire topography data for the object. More than 3 basic colors are used to construct the pattern to increase resolution with great number of color combination. According to the color composition and combination, color distortion caused by model projection can be prevented, thereby increasing the reliability and broadening the application of the color acquisition device and method.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: August 19, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Yuan-Hao Yeh, I-Cheng Chang, Ching-Long Huang
  • Publication number: 20040258297
    Abstract: A method of acquiring 3D color information and a 3D color information acquisition apparatus, suitable for obtaining a 3D model of an object, use a pattern light source to acquire topography data for the object. More than 3 basic colors are used to construct the pattern to increase resolution with great number of color combination. According to the color composition and combination, color distortion caused by model projection can be prevented, thereby increasing the reliability and broadening the application of the color acquisition device and method.
    Type: Application
    Filed: September 23, 2003
    Publication date: December 23, 2004
    Inventors: Yuan-Hao Yeh, I-Cheng Chang, Ching-Long Huang
  • Patent number: 6424451
    Abstract: An acousto-optic tunable filter (AOTF) utilizing phased array transducers for use as dynamically reconfigurable wavelength division multiplexer. The new type of AOTF has the unique capability of simultaneous and independent selection of multi-wavelength signals and separation into multiple output ports. Preferred embodiments of the AOTF are described that provide increased resolution, narrow channel spacing, lower drive power and reduced coherent crosswalk.
    Type: Grant
    Filed: May 22, 1999
    Date of Patent: July 23, 2002
    Inventor: I-Cheng Chang
  • Patent number: 6016216
    Abstract: A polarization independent acousto-optic tunable filter (PIAOTF) used for multiwavelength switching and routing in wavelength division multiplexing (WDM) networks. In the PIAOTF an incident unpolarized light beam is divided to propagate and to be diffracted along two polarization division branches. By using polarization converters and equal optical paths for the two polarization division channels, a PIAOTF is created which minimizes polarization dependent loss and polarization mode dispersion. Furthermore, a preferred embodiment of the AOTF using an elongated acousto-optic interaction medium is described that provides the additional advantages of narrow bandwidth, lower drive power and easier alignment.
    Type: Grant
    Filed: May 17, 1997
    Date of Patent: January 18, 2000
    Assignee: Aurora Photonics, Inc.
    Inventor: I-Cheng Chang
  • Patent number: 5909304
    Abstract: An acousto-optic tunable filter based on isotropic acousto-optic diffraction using phased array transducers. The isotropic AOTF provides the advantages of narrow optical passband, low acoustic frequencies, and insensitivity to the input optical polarization. Preferred embodiments of the isotropic AOTFs are described for optimized spectral resolution and diffraction efficiency.
    Type: Grant
    Filed: April 19, 1994
    Date of Patent: June 1, 1999
    Assignee: Aurora Photonics, Inc.
    Inventor: I-Cheng Chang
  • Patent number: 5576880
    Abstract: An acousto-optic modulator utilizing light diffraction by phased acoustic waves in a birefringent crystal. The wavevector of the resultant acoustic wave is selected so that the tangents to the loci of the wavevectors of the incident and diffracted light are parallel. This provides a large acceptance angle for the acousto-optic modulator. By simultaneously choosing the acoustic wavevector to be tangential to the locus of the diffracted light wavevector, the acousto-optic modulator also achieves increased modulation bandwidth.
    Type: Grant
    Filed: March 31, 1994
    Date of Patent: November 19, 1996
    Assignee: Aurora Photonics, Inc.
    Inventor: I-Cheng Chang
  • Patent number: 5436720
    Abstract: An apparatus, using two acousto-optical tuned filters for determining the wavelength and angle of approach of a light wave.
    Type: Grant
    Filed: February 29, 1984
    Date of Patent: July 25, 1995
    Assignee: Litton Systems, Inc.
    Inventor: I-Cheng Chang
  • Patent number: 5329397
    Abstract: An electronically tunable optical filter utilizing noncollinear acousto-optic interaction in an acoustically anisotropic, optically birefringent crystal. The directions of optical and acoustic waves are chosen so that the optical ray is collinear with the group velocity of the acoustic wave. The collinear beam configuration provides increased spectral resolution and reduced drive power.
    Type: Grant
    Filed: August 4, 1992
    Date of Patent: July 12, 1994
    Inventor: I-Cheng Chang
  • Patent number: 4827229
    Abstract: A bulk acoustic wave spectrum analyzer and channelizer, using bulk acoustic wave beams in a body of material having the property of conducting bulk acoustic wave beams, including acoustically reflecting surfaces. An input transducer is positioned upon one surface of the body for launching acoustic beams into the body. At least one output transducer set, including a plurality of aligned, juxtaposed electrodes are placed on the outer surfaces of each of the output transducers of the transducer sets.
    Type: Grant
    Filed: June 30, 1987
    Date of Patent: May 2, 1989
    Assignee: Litton Systems, Inc.
    Inventors: Farhang Sabet-Peyman, I-Cheng Chang
  • Patent number: 4720177
    Abstract: An electronically tunable optical filter utilizing noncollinear acousto-optic interaction in a birefringent crystal. Light is diffracted by a secondary acoustic wave generated from a primary acoustic wave by mode conversion at an internal surface of the birefringent crystal. A preferred configuration is described in which the primary acoustic wave is excited by acoustical transducers bonded to the same face as the optical aperture. The configuration has the advantages of simpler construction and improved performance.
    Type: Grant
    Filed: September 28, 1984
    Date of Patent: January 19, 1988
    Inventor: I-Cheng Chang