Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system mainly comprises a coolant circulation module, which includes a coolant supply channel communicated with an inlet of a chip socket and a coolant recovery channel communicated with an outlet of the chip socket. When an electronic device is accommodated in the chip socket, the coolant circulation module supplies a coolant into the chip socket through the coolant supply channel and the inlet, and the coolant passes through the pogo pins and then flows into the coolant recovery channel through the outlet.

Abstract: A phase-change temperature regulating system and an electronic device testing apparatus and method are described. In an embodiment, the system uses a temperature regulating fluid chamber containing a temperature regulating fluid to allow the temperature regulating fluid to cover at least a part of at least one surface of an electronic component. When a temperature of the electronic component reaches a boiling point of the temperature regulating fluid, the temperature regulating fluid becomes steam through a phase change to transfer heat energy outward from the electronic component, and condenses on an inner surface of the fluid chamber to further transfer heat energy of the steam to a temperature-regulating apparatus. The condensed temperature regulating fluid flows back to the temperature regulating fluid, thereby continuously circulating.

Abstract: An inspection system with a thermal interface, and an electronic component inspection device and method are provided. First, a temperature regulator contacts an electronic component to be tested, where there is a thermal interface between the temperature regulator and the electronic component to be tested, and the electronic component to be tested includes a plurality of temperature sensing units. Then, the temperature regulator heats or cools the electronic component to be tested to a specific temperature, and the plurality of temperature sensing units of the electronic component to be tested detect temperatures at locations of the temperature sensing units. In this way, a contact condition between the temperature regulator and the electronic component to be tested, and quality or an aging status of the thermal interface can be determined.

Abstract: A circuit layout checking method includes: determining whether there is only a first layout pattern and/or a second layout pattern corresponding to a filler cell or a second gate array cell exist in a region extending outward from the first layout pattern corresponding to a first gate array cell; determining whether a first pattern corresponding to an electrical connection layer in the first layout pattern is enclosed by a second pattern corresponding to a metal layer in the first layout pattern and whether each spacing between all boundaries of the first pattern and those of the second pattern is not less than a predetermined distance; and if there is only the first and/or second layout patterns in the first region and if the first pattern is enclosed by the second pattern and each spacing is not less than the predetermined distance, generating data indicating layout design of an integrated circuit.

Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system uses a cooling fluid supply module for the cooling of the pogo pin, and the cooling fluid may be either a coolant or a cooling gas. When an electronic device is accommodated in the chip socket, the cooling fluid supply module supplies a cooling fluid into the chip socket through the cooling fluid supply channel and the inlet, and the cooling fluid passes through the pogo pins and then flows into the cooling fluid discharge channel through the outlet. In the present invention, the cooling fluid is mainly used to cool not only the pogo pins in the chip socket but also the bottom surface of the electronic device and the solder ball contacts on the bottom surface.

Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system mainly comprises a coolant circulation module, which includes a coolant supply channel communicated with an inlet of a chip socket and a coolant recovery channel communicated with an outlet of the chip socket. When an electronic device is accommodated in the chip socket, the coolant circulation module supplies a coolant into the chip socket through the coolant supply channel and the inlet, and the coolant passes through the pogo pins and then flows into the coolant recovery channel through the outlet.

Abstract: A liquid cooling system, a liquid cooling method, and an electronic device-testing apparatus having the system are disclosed. When an electronic device is accommodated in a chip slot of a test socket, a cooling liquid supply device supplies a cooling liquid to the chip slot through a fluid inlet portion, and the cooling liquid at least flows over parts of the upper and lower surfaces of the electronic device and then flows out from a fluid outlet portion. The chip slot of the test socket serves as the flow space for the cooling liquid so that the cooling liquid can flow over the upper and lower surfaces of the electronic device, and the electronic device can be immersed in the continuously flowing cooling liquid. The flowing cooling liquid can also take away foreign matter, avoiding the influence of the foreign matter on the test.

Abstract: The present invention relates to a temperature control system and a temperature control method for an electronic device-testing apparatus. The temperature control system mainly includes a test socket, a temperature-controlling fluid supply device and a temperature-controlling fluid recovery device. A temperature-controlling fluid is supplied to a chip slot of the test socket by the temperature-controlling fluid supply device and drawn from the chip slot by the temperature-controlling fluid recovery device. In the present invention, the temperature-controlling fluid is forced to flow through the chip slot loaded with an electronic device so as to forcibly exchange heat with the electronic device and components in the chip slot, thereby achieving the constant temperature test. After the test is completed, the temperature-controlling fluid can be effectively recovered so that the contamination of the electronic device or the testing apparatus can be avoided.

Abstract: An IC design method is provided that includes steps outlined below. A clock tree structure is retrieved from an IC design file. A branch level number of a branch that each of clock units in the clock tree structure locates is determined. A common branch level number of a common branch that closest to each two of the flip-flops is determined. A scan chain structure is retrieved from the IC design file. A wire distance and a clock skew of each two of the flip-flops are determined. A cost is calculated according to the common branch number, the wire distance and the clock skew. An initial point and a terminal point of the flip-flops in the scan chain structure are determined to further calculate a path having a minimum cost. The order of the scan chain structure of the IC design file is updated.

Abstract: An IC design method is provided that includes steps outlined below. A clock tree structure is retrieved from an IC design file. A branch level number of a branch that each of clock units in the clock tree structure locates is determined. A common branch level number of a common branch that closest to each two of the flip-flops is determined. A scan chain structure is retrieved from the IC design file. A wire distance and a clock skew of each two of the flip-flops are determined. A cost is calculated according to the common branch number, the wire distance and the clock skew. An initial point and a terminal point of the flip-flops in the scan chain structure are determined to further calculate a path having a minimum cost. The order of the scan chain structure of the IC design file is updated.

Abstract: The invention discloses a clock tree synthesis method including steps of: determining a driving strength of a clock cell; determining a reserved space corresponding to the clock cell according to the driving strength; generating the clock cell and the reserved space, wherein the reserved space is adjacent to the clock cell; setting a decoupling capacitor filler cell in the reserved space, wherein the area and/or capacitance of the decoupling capacitor filler cell are/is associated with the driving strength; and fixing the attribute(s) of the clock cell and the attribute(s) of the decoupling capacitor filler cell.

Abstract: The invention discloses a clock tree synthesis method including steps of: determining a driving strength of a clock cell; determining a reserved space corresponding to the clock cell according to the driving strength; generating the clock cell and the reserved space, wherein the reserved space is adjacent to the clock cell; setting a decoupling capacitor filler cell in the reserved space, wherein the area and/or capacitance of the decoupling capacitor filler cell are/is associated with the driving strength; and fixing the attribute(s) of the clock cell and the attribute(s) of the decoupling capacitor filler cell.