Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.

Abstract: A processing method of a single crystal material includes the following steps. A single crystal material is provided as an object to be modified. The amorphous phase modification apparatus is used for emitting a femtosecond laser beam to process an internal portion of the object to be modified. The processing includes using a femtosecond laser beam to form a plurality of processing lines in the internal portion of the object to be modified, wherein each of the processing lines include a zigzag pattern processing, and a processing line spacing between the plurality of processing lines is in a range of 200 ?m to 600 ?m, wherein after the object to be modified is processed, a modified layer is formed in the object to be modified. Slicing or separating out a portion in the object to be modified that includes the modified layer.

Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.

Abstract: A memory storage device having a rewritable non-volatile memory module, a first connection interface unit, a second connection interface unit, a power management circuit and a memory control circuit unit is provided. When an external power supply device is electrically connected to the second connection interface unit, the power management circuit receives a second power supply voltage from the external power supply device via the second connection interface unit, supplies an operation voltage to the rewritable non-volatile memory module and the memory control circuit unit and supplies the second power supply voltage to a host device. When the external power supply device is electrically disconnected with the second connection interface unit, the power management circuit receives a first power supply voltage from the host device via the first connection interface unit and supplies the operation voltage to the memory control circuit unit and the rewritable non-volatile memory module.

Abstract: A memory storage device having a rewritable non-volatile memory module, a first connection interface unit, a second connection interface unit, a power management circuit and a memory control circuit unit is provided. When an external power supply device is electrically connected to the second connection interface unit, the power management circuit receives a second power supply voltage from the external power supply device via the second connection interface unit, supplies an operation voltage to the rewritable non-volatile memory module and the memory control circuit unit and supplies the second power supply voltage to a host device. When the external power supply device is electrically disconnected with the second connection interface unit, the power management circuit receives a first power supply voltage from the host device via the first connection interface unit and supplies the operation voltage to the memory control circuit unit and the rewritable non-volatile memory module.