Patents by Inventor I-Chung Tung
I-Chung Tung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060201997Abstract: A fine pad pitch organic circuit board with plating solder and a method for fabricating the circuit board with plating solder are provided. The circuit board is formed with a plurality of densely arranged contact pads on at least a surface thereof in the absence of solder mask being applied over the surface. After deposition of a conductive seed layer on the contact pads, a resist layer is applied over the surface of the circuit board, and formed with a plurality of openings for exposing the seed layer corresponding in position to the contact pads. Then, a solder material is deposited in the openings by a plating method. Finally, the resist layer and the seed layer underneath the resist layer are removed, making the circuit board readily subject to subsequent fabrication processes for forming flip-chip joints or board-to-board joints.Type: ApplicationFiled: May 26, 2006Publication date: September 14, 2006Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventor: I-Chung Tung
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Patent number: 7098126Abstract: A method of fabricating electroplate solder on an organic circuit board for forming flip chip joints and board to board solder joints is disclosed. In the method, there is initially provided an organic circuit board including a surface bearing electrical circuitry that includes at least one contact pad. A solder mask layer that is placed on the board surface and patterned to expose the pad. Subsequently, a metal seed layer is deposited by physical vapor deposition, chemical vapor deposition, electroless plating with the use of catalytic copper, or electroplating with the use of catalytic copper, over the board surface. A resist layer with at least an opening located at the pad is formed over the metal seed layer. A solder material is then formed in the opening by eletroplating. Finally, the resist and the metal seed layer beneath the resist are removed.Type: GrantFiled: November 9, 2001Date of Patent: August 29, 2006Assignee: Phoenix Precision Technology Corp.Inventors: Han-Kun Hsieh, Shing-Ru Wang, I-Chung Tung
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Patent number: 6910264Abstract: A method for fabricating a core circuit board having passive components, such as resistors, capacitors and inductors, is disclosed, which can be used to construct a multilayer circuit board having embedded passive components. In making such as a core circuit board, a resistive film which is a continuous or non-continuous is first formed on one side of a conductive foil. Two such conductive foils are laminated onto a high dielectric layer. The electrodes for various passive components or spiral coils for the inductive components and electrical circuit pattern are finally made on the same conductive foils simultaneously. Finally, a core circuit board having passive components for further making a multilayer circuit board is thus constructed.Type: GrantFiled: January 3, 2003Date of Patent: June 28, 2005Assignee: Phoenix Precision Technology Corp.Inventor: I-Chung Tung
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Publication number: 20040128822Abstract: A method for fabricating a core circuit board having passive components, such as resistors, capacitors and inductors, is disclosed, which can be used to construct a multilayer circuit board having embedded passive components. In making such as a core circuit board, a resistive film which is a continuous or non-continuous is first formed on one side of a conductive foil. Two such conductive foils are laminated onto a high dielectric layer. The electrodes for various passive components or spiral coils for the inductive components and electrical circuit pattern are finally made on the same conductive foils simultaneously. Finally, a core circuit board having passive components for further making a multilayer circuit board is thus constructed.Type: ApplicationFiled: January 3, 2003Publication date: July 8, 2004Inventor: I-Chung Tung
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Publication number: 20040084206Abstract: A fine pad pitch organic circuit board with plating solder and a method for fabricating the circuit board with plating solder are provided. The circuit board is formed with a plurality of densely arranged contact pads on at least a surface thereof in the absence of solder mask being applied over the surface. After deposition of a conductive seed layer on the contact pads, a resist layer is applied over the surface of the circuit board, and formed with a plurality of openings for exposing the seed layer corresponding in position to the contact pads. Then, a solder material is deposited in the openings by a plating method. Finally, the resist layer and the seed layer underneath the resist layer are removed, making the circuit board readily subject to subsequent fabrication processes for forming flip-chip joints or board-to-board joints.Type: ApplicationFiled: November 6, 2002Publication date: May 6, 2004Inventor: I-Chung Tung
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Patent number: 6574863Abstract: Disclosed is a method of preparing a thin core substrate for fabricating a build-up multilayer circuit board. The method involves the use of an insulating layer which is covered with the electrically conductive sheets. The openings are made in the electrically conductive layers at the predetermined positions, where the vias are also formed in the insulating layer. An electrically conductive layer is deposited to cover the vias. After the electrically conductive sheets and layer are patterned, a thin core substrate is constructed. The build-up layers are then made at least one side of the thin core substrate to form a build-up multilayer circuit board.Type: GrantFiled: April 20, 2001Date of Patent: June 10, 2003Assignee: Phoenix Precision Technology CorporationInventors: I-Chung Tung, Han-Kun Hsieh, Shih-Ping Hsu
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Patent number: 6543676Abstract: A pin attachment method for mounting the pins on a wiring substrate for fabricating a pin grid array package is disclosed. There is provided an organic wiring board including a surface bearing electrical circuitry which includes at least one contact pad for receiving a pin. A solder mask layer which is placed on the board surface and patterned to expose the pad. The solder mask layer which does not cover any portion of the pad and forms a well by the perimeter of the solder mask layer around the pad. Subsequently, a pin and a solder material which are placed over said pad in the well. The pin which is soldered to the pad by a temperature sufficient to melt the solder material.Type: GrantFiled: June 4, 2001Date of Patent: April 8, 2003Assignee: Phoenix Precision Technology CorporationInventors: I-Chung Tung, Shih-Ping Hsu
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Publication number: 20030022477Abstract: A method of fabricating electroplate solder on an organic circuit board for forming flip chip joints and board to board solder joints is disclosed. In the method, there is initially provided an organic circuit board including a surface bearing electrical circuitry that includes at least one contact pad. A solder mask layer that is placed on the board surface and patterned to expose the pad. Subsequently, a metal seed layer is deposited by physical vapor deposition, chemical vapor deposition, electroless plating with the use of catalytic copper, or electroplating with the use of catalytic copper, over the board surface. A resist layer with at least an opening located at the pad is formed over the metal seed layer. A solder material is then formed in the opening by eletroplating. Finally, the resist and the metal seed layer beneath the resist are removed.Type: ApplicationFiled: November 9, 2001Publication date: January 30, 2003Inventors: Han-Kun Hsieh, Shing-Ru Wang, I-Chung Tung
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Publication number: 20020182374Abstract: A method for fabricating an organic circuit board having embedded passive components, such as resistors, capacitors and inductors, is disclosed. In embedding a resistor or capacitor, a passive unit of a resistive film or a capacitive film is first made on one side of a conductive foil. In forming an inductor, a soft magnetic film is first made on one side of a conductive foil. The foil with the soft magnetic film is then introduced into the multilayer circuit board processing. The electrodes for various passive components or spiral coils for the inductive components and electrical circuit pattern are finally made on the same conductive foil simultaneously. The soft magnetic film deposited on the top of the spiral coil may be made to further improve inductor performance.Type: ApplicationFiled: March 22, 2002Publication date: December 5, 2002Inventor: I-Chung Tung
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Publication number: 20020179692Abstract: A pin attachment method for mounting the pins on a wiring substrate for fabricating a pin grid array package is disclosed. There is provided an organic wiring board including a surface bearing electrical circuitry which includes at least one contact pad for receiving a pin. A solder mask layer which is placed on the board surface and patterned to expose the pad. The solder mask layer which does not cover any portion of the pad and forms a well by the perimeter of the solder mask layer around the pad. Subsequently, a pin and a solder material which are placed over said pad in the well. The pin which is soldered to the pad by a temperature sufficient to melt the solder material.Type: ApplicationFiled: June 4, 2001Publication date: December 5, 2002Inventors: I-Chung Tung, Shih-Ping Hsu
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Patent number: 6475327Abstract: A stiff heat spreader element for making a cavity down plastic chip carrier having benefits of excellent heat dissipation property, low weight, small thickness, low warpage and low twist is disclosed. The stiff heat spreader element is formed by bonding a heat spreader and a thermally conductive sheet with using a first bonding sheet. The first bonding sheet is a prepreg or prepregs made of fiber-reinforced resin. A second bonding sheet is used to bond a circuit substrate and the stiff heat spreader element. The second bonding sheet is made of a single adhesive layer or a stack of adhesive layers. The adhesive layer is made of an adhesive material, or a flake-filled adhesive material, or short fiber-filled adhesive material, or a particle-filled adhesive material. The second bonding sheet is not a prepreg or prepregs. The circuit substrate has an opening to receive an electronic chip.Type: GrantFiled: April 5, 2001Date of Patent: November 5, 2002Assignee: Phoenix Precision Technology CorporationInventors: I-Chung Tung, Jiun-Shian Yu, Kuo-Bin Chen, Shih-Ping Hsu
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Publication number: 20020152611Abstract: Disclosed is a method of preparing a thin core substrate for fabricating a build-up multilayer circuit board. The method involves the use of an insulating layer which is covered with the electrically conductive sheets. The openings are made in the electrically conductive layers at the predetermined positions, where the vias are also formed in the insulating layer. An electrically conductive layer is deposited to cover the vias. After the electrically conductive sheets and layer are patterned, a thin core substrate is constructed. The build-up layers are then made at least one side of the thin core substrate to form a build-up multilayer circuit board.Type: ApplicationFiled: April 20, 2001Publication date: October 24, 2002Inventors: I-Chung Tung, Han-Kun Hsieh, Shih-Ping Hsu
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Publication number: 20020144775Abstract: A stiff heat spreader element for making a cavity down plastic chip carrier having benefits of excellent heat dissipation property, low weight, small thickness, low warpage and low twist is disclosed. The stiff heat spreader element is formed by bonding a heat spreader and a thermally conductive sheet with using a first bonding sheet. The first bonding sheet is a prepreg or prepregs made of fiber-reinforced resin. A second bonding sheet is used to bond a circuit substrate and the stiff heat spreader element. The second bonding sheet is made of a single adhesive layer or a stack of adhesive layers. The adhesive layer is made of an adhesive material, or a flake-filled adhesive material, or short fiber-filled adhesive material, or a particle-filled adhesive material. The second bonding sheet is not a prepreg or prepregs. The circuit substrate has an opening to receive an electronic chip.Type: ApplicationFiled: April 5, 2001Publication date: October 10, 2002Inventors: I-Chung Tung, Jiun-Shian Yu, Kuo-Bin Chen, Shih-Ping Hsu
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Publication number: 20020124955Abstract: A heat spreader attachment method for making a cavity down plastic chip carrier devoid of warpage and twist is disclosed. A bonding sheet is used to bond a circuit substrate and a heat spreader. The bonding sheet is made of a single adhesive layer or a stacking of more adhesive layers. The adhesive layer is made of an adhesive material, or a flake-filled adhesive material, or fiber-filled adhesive material, or a particle-filled adhesive material. The circuit substrate possesses an opening to receive an electrionic chip.Type: ApplicationFiled: March 8, 2001Publication date: September 12, 2002Inventors: I-Chung Tung, Shih-Ping Hsu
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Patent number: 5468429Abstract: A method which includes a flashing process and a process for extruding thermoplastic plastics is provided for achieving more thorough devolatilizing of the solutions of thermoplastic plastics, to ensure that the solutions of thermoplastic plastics are able to be worked continually, wherein the accoustic treatments are introduced into both processes to increase the efficiency of removing volatile components and thus leads to the decrease of the processing time for extruding thermoplastic plastics. In the flashing process, the ultrasonic horns are arranged to scatter the feed stream of the solution which increases the devolatilizing surface of the polymer fluid and, simultaneously, to enhance bubble formation and produce strong agitation in the polymer fluid, thereby increasing the devolatilizing efficiency. In the process of extruding thermoplastic plastics, the ultrasonic horns are arranged in the extruder to enhance both formation and rupture of bubbles, thereby increasing the devolatilizing efficiency.Type: GrantFiled: April 15, 1994Date of Patent: November 21, 1995Inventors: Tzu-Li Li, I-Chung Tung, Duncan Yu