Abstract: An insertion apparatus receives a byte value from a signaling channel, locates a particular unused byte location within an overhead portion of a synchronous optical network (SONET) frame, and inserts the byte value from the signaling channel into the particular unused byte location. An extraction apparatus receives a synchronous optical network (SONET) frame, locates a particular byte location within an overhead portion of the SONET frame that is unused for SONET purposes, and captures a byte value from the particular byte location, wherein the byte value comprises a signaling channel.

Abstract: An optical networking module is formed with an integrated module including optical, optical-electrical and protocol processing components, and complementary software. In one embodiment, the integral protocol processing component is a single ASIC and supports multiple protocols. The module is further equipped with support control electronics in support of control functions to manage the optical, optical-electrical as well as the multi-protocol processing component. The integrated module together with the complementary control software present to an optical networking equipment designer/developer a singular component that handles optical to electrical and electrical to optical conversion, as well as data link and physical sub-layer processing for a selected one of a plurality of datacom and telecom protocols, spanning local, regional as well as wide area networks.

Abstract: A buffering structure including at least a first FIFO storage structure to stage at least a selected one of undiverted egress packets and undiverted ingress packets is provided. The buffering structure further includes at least first associated packet drop logic to selectively effectuate head or tail flushes of the first FIFO storage structure. In various embodiments, one or more additional FIFO storage structures are also provided to stage one or more diverted and/or insertion of egress/ingress packets. Those use for staging diverted egress/ingress packets are likewise provided with associated packet drop logic to perform tail flushes of these additional FIFO structures. In one application, the buffering structure is employed by a multi-protocol network processor, which in turn is employed by an optical networking module.

Abstract: A buffering structure including at least a first FIFO storage structure to stage at least a selected one of undiverted egress packets and undiverted ingress packets is provided. The buffering structure further includes at least first associated packet drop logic to selectively effectuate head or tail flushes of the first FIFO storage structure. In various embodiments, one or more additional FIFO storage structures are also provided to stage one or more diverted and/or insertion of egress/ingress packets. Those use for staging diverted egress/ingress packets are likewise provided with associated packet drop logic to perform tail flushes of these additional FIFO structures. In one application, the buffering structure is employed by a multi-protocol network processor, which in turn is employed by an optical networking module.

Abstract: A buffering structure including at least a first FIFO storage structure to stage at least a selected one of undiverted egress packets and undiverted ingress packets is provided. The buffering structure further includes at least first associated packet drop logic to selectively effectuate head or tail flushes of the first FIFO storage structure. In various embodiments, one or more additional FIFO storage structures are also provided to stage one or more diverted and/or insertion of egress/ingress packets. Those use for staging diverted egress/ingress packets are likewise provided with associated packet drop logic to perform tail flushes of these additional FIFO structures. In one application, the buffering structure is employed by a multi-protocol network processor, which in turn is employed by an optical networking module.

Abstract: Methods and apparatus provide single or multi-port, flexible, cost-effective, built-in self-test capabilities for network communications equipment, such as for example switches, and programmably generate, and subsequently analyze, one or more sequences of test packets, wherein the test packets simulate at least two flows of traffic. Such test packets can have programmable headers, payloads, and duty cycle. A line card embodying the present invention may generate its own traffic pattern, which may be similar or identical, to traffic patterns observed on Internet backbones. These traffic patterns may contain a bimodal distribution of control packets interspersed with data packets wherein the control packets and data packets are relatively short and long respectively. A plurality of test packet generators/receivers can be deployed in a network communications device having a plurality of ports. In such a configuration, test generator/receiver is associated with each of the plurality of ports.

Abstract: A networking processor is formed with selected ones of one or more system interfaces, one or more network/intermediate interfaces, a plurality of data link sub-layer control/processing blocks, and a plurality of physical sub-layer coders/decoders and processing units. The elements are provisioned in a combinatorially selectable manner, enabling the single networking processor to be able to selectively facilitate data trafficking in accordance with a selected one of a plurality of protocols. The protocols include at least one each a datacom and a telecom protocol. Accordingly, the network processor supports data traffics spanning local, regional and wide area networks. In one embodiment, the traffic data may be framed or streaming data being transmitted/received in accordance with a selected one of a plurality frame based protocols and a plurality of variants of a synchronous protocol. The frame based protocols may also be frame based protocols encapsulated with the synchronous protocol.

Abstract: An insertion apparatus receives a byte value from a signaling channel, locates a particular unused byte location within an overhead portion of a synchronous optical network (SONET) frame, and inserts the byte value from the signaling channel into the particular unused byte location. An extraction apparatus receives a synchronous optical network (SONET) frame, locates a particular byte location within an overhead portion of the SONET frame that is unused for SONET purposes, and captures a byte value from the particular byte location, wherein the byte value comprises a signaling channel.