Patents by Inventor I-Hsien Tang

I-Hsien Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9153675
    Abstract: A power semiconductor includes a semiconductor substrate, a metal oxide semiconductor layer, a N-type buffer layer and a P-type injection layer. The semiconductor substrate has a first surface and a second surface. The metal oxide semiconductor layer is formed on the first surface for defining a N-type drift layer of the semiconductor substrate. The N-type buffer layer is formed on the second surface through ion implanting, and the P-type injection layer is formed on the N-type buffer layer through ion implanting. By utilizing the semiconductor substrate having drift layer and forming the N-type buffer layer and the P-type injection layer on the second surface of the semiconductor substrate through ion implanting, the ion concentration is adjustable. As a result, the electron hole injection efficiency and the width of depletion region are easily adjusted, the fabricating processes are simplified, and the fabricating time and cost are reduced.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: October 6, 2015
    Assignee: MOSEL VITALEC INC.
    Inventors: Chien-Ping Chang, Chien-Chung Chu, I-Hsien Tang, Chon-Shin Jou, Mao-Song Tseng, Shin-Chi Lai
  • Publication number: 20140327038
    Abstract: A power semiconductor includes a semiconductor substrate, a metal oxide semiconductor layer, a N-type buffer layer and a P-type injection layer. The semiconductor substrate has a first surface and a second surface. The metal oxide semiconductor layer is formed on the first surface for defining a N-type drift layer of the semiconductor substrate. The N-type buffer layer is formed on the second surface through ion implanting, and the P-type injection layer is formed on the N-type buffer layer through ion implanting. By utilizing the semiconductor substrate having drift layer and forming the N-type buffer layer and the P-type injection layer on the second surface of the semiconductor substrate through ion implanting, the ion concentration is adjustable. As a result, the electron hole injection efficiency and the width of depletion region are easily adjusted, the fabricating processes are simplified, and the fabricating time and cost are reduced.
    Type: Application
    Filed: August 23, 2013
    Publication date: November 6, 2014
    Applicant: Mosel Vitalec Inc.
    Inventors: Chien-Ping Chang, Chien-Chung Chu, I-Hsien Tang, Chon-Shin Jou, Mao-Song Tseng, Shin-Chi Lai