Patents by Inventor I-HSIEN TSENG

I-HSIEN TSENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087644
    Abstract: A forming operation of resistive memory device is provided. The operation includes: applying a pre-forming gate voltage and a pre-forming bit line voltage to a target memory cell; performing a dense switching forming operation, wherein the dense switching forming operation includes alternately performing dense set operations and dense reset operations on the target memory cell, wherein the dense set operation includes applying a dense switching gate voltage and a dense set bit line voltage; and performing a normal set operation on the target memory cell, wherein the normal set operation includes applying a normal set gate voltage and a normal set bit line voltage to the target memory cell, the normal set gate voltage is greater than the pre-forming gate voltage and the dense switching gate voltage, and the normal set bit line voltage is less than the pre-forming bit line voltage and the dense set bit line voltage.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 14, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: I-Hsien Tseng, Lung-Chi Cheng, Ju-Chieh Cheng, Jun-Yao Huang, Ping-Kun Wang
  • Publication number: 20220314567
    Abstract: Processes and systems for thermoforming articles of wear are disclosed. The process can include utilizing a negative pressure generation system to seal an article in a forming material thereby compressing the forming material onto the outer surface of the article. The process can also include exposing the sealed article to an increased temperature followed by exposure to a decrease temperature, while maintaining the compressive force of the forming material on the outer surface of the article. A positive pressure can also be applied to the sealed article while undergoing the heating and/or cooling steps, which can facilitate the removal of bubbles from the article during thermoforming as well as apply additional compressive force to the outer surface of the article.
    Type: Application
    Filed: June 13, 2022
    Publication date: October 6, 2022
    Inventors: Giovanni ADAMI, Sam AMIS, Sergio CAVALIERE, Meng-Chun HU, John HURD, James MOLYNEUX, Thomas J. RUSHBROOK, Timothy J. SMITH, I-Hsien TSENG, Mirko BIANCONI, Frederico ZECCHETTO
  • Patent number: 11400673
    Abstract: Processes and systems for thermoforming articles of wear are disclosed. The process can include utilizing a negative pressure generation system to seal an article in a forming material thereby compressing the forming material onto the outer surface of the article. The process can also include exposing the sealed article to an increased temperature followed by exposure to a decrease temperature, while maintaining the compressive force of the forming material on the outer surface of the article. A positive pressure can also be applied to the sealed article while undergoing the heating and/or cooling steps, which can facilitate the removal of bubbles from the article during thermoforming as well as apply additional compressive force to the outer surface of the article.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: August 2, 2022
    Assignee: NIKE, Inc.
    Inventors: Giovanni Adami, Sam Amis, Sergio Cavaliere, Meng-Chun Hu, John Hurd, James Molyneux, Thomas J. Rushbrook, Timothy J. Smith, I-Hsien Tseng, Mirko Bianconi, Federico Zecchetto
  • Patent number: 10643698
    Abstract: An operating method of a resistive memory storage apparatus includes: applying a forming voltage to a memory cell and obtaining a cell current of the memory cell; and determining whether to adjust the forming voltage and apply the adjusted forming voltage to the memory cell according to a magnitude relationship between the cell current and a reference current. The memory cell to which the forming voltage is applied operates in a heavy forming mode and serves as a one-time programmable memory device.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: May 5, 2020
    Assignee: Windbond Electronics Corp.
    Inventors: Lih-Wei Lin, Ju-Chieh Cheng, Tsung-Huan Tsai, I-Hsien Tseng
  • Publication number: 20200027507
    Abstract: An operating method of a resistive memory storage apparatus includes: applying a forming voltage to a memory cell and obtaining a cell current of the memory cell; and determining whether to adjust the forming voltage and apply the adjusted forming voltage to the memory cell according to a magnitude relationship between the cell current and a reference current. The memory cell to which the forming voltage is applied operates in a heavy forming mode and serves as a one-time programmable memory device.
    Type: Application
    Filed: August 15, 2018
    Publication date: January 23, 2020
    Applicant: Winbond Electronics Corp.
    Inventors: Lih-Wei Lin, Ju-Chieh Cheng, Tsung-Huan Tsai, I-Hsien Tseng
  • Patent number: 10490275
    Abstract: A writing method of a resistive memory storage apparatus is provided. The writing method includes: applying a first set voltage on a memory cell, and acquiring a first reading current of the memory cell; applying a first disturbance voltage on the memory cell, and acquiring a second reading current of the memory cell; and determining to apply a second set voltage or a second disturbance voltage on the memory cell according to a magnitude relationship between the first reading current and the second reading current. An absolute value of the first disturbance voltage is smaller than an absolute value of a reset voltage, and an absolute value of the second disturbance voltage is smaller than an absolute value of the second set voltage. In addition, a resistive memory storage apparatus is also provided.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: November 26, 2019
    Assignee: Winbond Electronics Corp.
    Inventors: Lih-Wei Lin, Ju-Chieh Cheng, Tsung-Huan Tsai, I-Hsien Tseng
  • Publication number: 20190351604
    Abstract: Systems and processes for thermoforming an article are disclosed. The system can include a first heating station that can include a first heating zone and a second heating zone. The system can further include a first cooling station for reducing the temperature of the heated article to a range of about 50° C. to about 70° C. while exposing the article to atmospheric pressure. The system can also include a second cooling station that can expose an article to a pressure above atmospheric pressure.
    Type: Application
    Filed: May 17, 2019
    Publication date: November 21, 2019
    Inventors: Tsung-Tai Chien, Meng-Chun Hu, I-Hsien Tseng, Guo-Chang Wang
  • Patent number: 10347336
    Abstract: The disclosure provides a method for obtaining optimal operating condition of a resistive random access memory (RRAM). The method includes: retrieving an RRAM chip and performing a forming operation and an initial reset operation thereto based on a first operating condition; segmenting the RRAM chip into blocks; performing a set operation to each of the blocks based on various operating voltages; obtaining a fail bit value of each of the blocks; generating an operating characteristic curve related to the RRAM chip based on the fail bit value of each of the blocks and the operating voltages, wherein the operating characteristic curve has a lowest fail bit value and an operating voltage window; and when the lowest fail bit value and the operating voltage window satisfy a first condition and a second condition, respectively, determining the first operating condition is an optimal operating condition of the RRAM chip.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: July 9, 2019
    Assignee: Winbond Electronics Corp.
    Inventors: Tsung-Huan Tsai, Lih-Wei Lin, I-Hsien Tseng, Wen-Ting Wang
  • Publication number: 20190057738
    Abstract: A writing method of a resistive memory storage apparatus is provided. The writing method includes: applying a first set voltage on a memory cell, and acquiring a first reading current of the memory cell; applying a first disturbance voltage on the memory cell, and acquiring a second reading current of the memory cell; and determining to apply a second set voltage or a second disturbance voltage on the memory cell according to a magnitude relationship between the first reading current and the second reading current. An absolute value of the first disturbance voltage is smaller than an absolute value of a reset voltage, and an absolute value of the second disturbance voltage is smaller than an absolute value of the second set voltage. In addition, a resistive memory storage apparatus is also provided.
    Type: Application
    Filed: July 30, 2018
    Publication date: February 21, 2019
    Applicant: Winbond Electronics Corp.
    Inventors: Lih-Wei Lin, Ju-Chieh Cheng, Tsung-Huan Tsai, I-Hsien Tseng
  • Patent number: 9691980
    Abstract: A method for forming a memory device is provided. The method includes forming a plurality of memory cells. The method also includes performing a first baking on the memory cells. The method further includes setting a specified current, and after performing the first baking, performing a test process on the memory cells. The test process includes reading the current of the memory cells. When the read current of the memory cells is larger than or equal to the specified current, the test process of the memory cell is done. When the read current of the memory cells is smaller than the specified current, a re-forming process is performed on the memory cells to form a plurality of re-formed memory cells, and then the test process is performed on the re-formed memory cells.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: June 27, 2017
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Chia-Hung Lin, Lih-Wei Lin, I-Hsien Tseng, Tsung-Huan Tsai
  • Publication number: 20170129200
    Abstract: Processes and systems for thermoforming articles of wear are disclosed. The process can include utilizing a negative pressure generation system to seal an article in a forming material thereby compressing the forming material onto the outer surface of the article. The process can also include exposing the sealed article to an increased temperature followed by exposure to a decrease temperature, while maintaining the compressive force of the forming material on the outer surface of the article. A positive pressure can also be applied to the sealed article while undergoing the heating and/or cooling steps, which can facilitate the removal of bubbles from the article during thermoforming as well as apply additional compressive force to the outer surface of the article.
    Type: Application
    Filed: November 9, 2016
    Publication date: May 11, 2017
    Inventors: Giovanni Adami, Sam Amis, Sergio Cavaliere, Meng-Chun Hu, John Hurd, James Molyneux, Thomas J. Rushbrook, Timothy J. Smith, I-Hsien Tseng, Mirko Bianconi, Federico Zecchetto
  • Patent number: 9627059
    Abstract: A resistive memory and a data writing method for a resistive memory cell thereof are provided. The method includes: receiving and decoding a column address signal for generating a decoded result, and providing a word line voltage to a word line of the resistive memory cell; providing a constant current to one of a bit line and a source line of the resistive memory cell, and coupling a reference ground voltage to another one of the bit line and the source line of the resistive memory cell.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: April 18, 2017
    Assignee: Winbond Electronics Corp.
    Inventors: Lih-Wei Lin, I-Hsien Tseng, Ju-Chieh Cheng, Chia-Hung Lin, Tsung-Huan Tsai, Po-Wei Huang
  • Patent number: 9620208
    Abstract: A memory-programming device includes a voltage generator, a resistive random-access memory, a current detector, and a controller. The voltage generator is configured to generate a program voltage. The resistive random-access memory receives the program voltage to generate a program current. The current detector detects the program current. The controller executes a program procedure. The program procedure includes: gradually ramping up the program voltage by the voltage generator and detecting the program current by the current detector; discovering the maximum of the program current to be a reference current; continuing to ramp up the program voltage by the voltage generator and determining whether the program current detected by the current detector is not less than the reference current; controlling the voltage generator to stop generating the program voltage when the program current is not less than the reference current.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: April 11, 2017
    Assignee: Winbond Electronics Corp.
    Inventors: Lih-Wei Lin, Tsung-Huan Tsai, Chia-Hung Lin, I-Hsien Tseng, Ju-Chieh Cheng
  • Publication number: 20170011798
    Abstract: A memory-programming device includes a voltage generator, a resistive random-access memory, a current detector, and a controller. The voltage generator is configured to generate a program voltage. The resistive random-access memory receives the program voltage to generate a program current. The current detector detects the program current. The controller executes a program procedure. The program procedure includes: gradually ramping up the program voltage by the voltage generator and detecting the program current by the current detector; discovering the maximum of the program current to be a reference current; continuing to ramp up the program voltage by the voltage generator and determining whether the program current detected by the current detector is not less than the reference current; controlling the voltage generator to stop generating the program voltage when the program current is not less than the reference current.
    Type: Application
    Filed: June 23, 2016
    Publication date: January 12, 2017
    Inventors: Lih-Wei LIN, Tsung-Huan TSAI, Chia-Hung LIN, I-Hsien TSENG, Ju-Chieh CHENG
  • Patent number: 9543010
    Abstract: A measurement system including a testing machine and a resistive memory is provided. The resistive memory includes a first storage cell. The first storage cell includes a transistor and a variable resistor. During a specific period, the testing machine provides a write voltage to change the state of the variable resistor. During a maintaining period, the testing machine maintains the level of the write voltage and measures the current passing through the variable resistor. When the current passing through the variable resistor does not arrive at a pre-determined value, the testing machine increases the level of the write voltage. Furthermore, a resistive memory utilizing the testing machine is also provided.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: January 10, 2017
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Lih-Wei Lin, Chia-Hung Lin, Tsung-Huan Tsai, Ju-Chieh Cheng, I-Hsien Tseng
  • Publication number: 20160276027
    Abstract: A resistive memory and a data writing method for a resistive memory cell thereof are provided. The method includes: receiving and decoding a column address signal for generating a decoded result, and providing a word line voltage to a word line of the resistive memory cell; providing a constant current to one of a bit line and a source line of the resistive memory cell, and coupling a reference ground voltage to another one of the bit line and the source line of the resistive memory cell.
    Type: Application
    Filed: December 22, 2015
    Publication date: September 22, 2016
    Inventors: Lih-Wei Lin, I-Hsien Tseng, Ju-Chieh Cheng, Chia-Hung Lin, Tsung-Huan Tsai, Po-Wei Huang
  • Publication number: 20160240268
    Abstract: A measurement system including a testing machine and a resistive memory is provided. The resistive memory includes a first storage cell. The first storage cell includes a transistor and a variable resistor. During a specific period, the testing machine provides a write voltage to change the state of the variable resistor. During a maintaining period, the testing machine maintains the level of the write voltage and measures the current passing through the variable resistor. When the current passing through the variable resistor does not arrive at a pre-determined value, the testing machine increases the level of the write voltage. Furthermore, a resistive memory utilizing the testing machine is also provided.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 18, 2016
    Inventors: LIH-WEI LIN, CHIA-HUNG LIN, TSUNG-HUAN TSAI, JU-CHIEH CHENG, I-HSIEN TSENG