Patents by Inventor I-Jye Lin

I-Jye Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Routing method for flip chip package and apparatus using the same
    Patent number: 8875083
    Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: October 28, 2014
    Assignee: Synopsys, Inc.
    Inventors: Chen-Feng Chang, Chin-Fang Shen, Hsien-Shih Chiu, I-Jye Lin, Tien-Chang Hsu, Yao-Wen Chang, Chun-Wei Lin, Po-Wei Lee
  • ROUTING METHOD FOR FLIP CHIP PACKAGE AND APPARATUS USING THE SAME
    Publication number: 20140033156
    Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.
    Type: Application
    Filed: October 3, 2013
    Publication date: January 30, 2014
    Applicant: SYNOPSYS, INC.
    Inventors: Chen-Feng Chang, Chin-Fang Shen, Hsien-Shih Chiu, I-Jye Lin, Tien-Chang Hsu, Yao-Wen Chang, Chun-Wei Lin, Po-Wei Lee
  • Routing method for flip chip package and apparatus using the same
    Patent number: 8578317
    Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: November 5, 2013
    Assignee: Synopsys, Inc.
    Inventors: Chen-Feng Chang, Chin-Fang Shen, Hsien-Shih Chiu, I-Jye Lin, Tien-Chang Hsu, Yao-Wen Chang, Chun-Wei Lin, Po-Wei Lee
  • Routing Method for Flip Chip Package and Apparatus Using the Same
    Publication number: 20120216167
    Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.
    Type: Application
    Filed: October 27, 2010
    Publication date: August 23, 2012
    Applicant: SYNOPSYS, INC.
    Inventors: Chen-Feng Chang, Chin-Fang Shen, Hsien-Shih Chiu, I-Jye Lin, Tien-Chang Hsu, Yao-Wen Chang, Chun-Wei Lin, Po-Wei Lee