Abstract: Non-volatile memory based computer systems and methods are described. According to one aspect of the invention, at least one non-volatile memory module is coupled to a computer system as main storage. The non-volatile memory module is controlled by a northbridge controller configured to control the non-volatile memory as main memory. The page size of the at least one non-volatile memory module is configured to be the size of one of the cache lines associated with a microprocessor of the computer system. According to another aspect, at least one non-volatile memory module is coupled to a computer system as data read/write buffer of one or more hard disk drives. The non-volatile memory module is controlled by a southbridge controller configured to control the non-volatile memory as an input/out device. The page size of the at least one non-volatile memory module is configured in proportion to characteristics of the hard disk drives.

Abstract: A memory card (e.g., SD or MMC) device including a PCBA in which components are mounted on a “rigid-flex” PCB including at least one rigid PCB section and at least one flexible PCB section, and a housing that includes both a pre-molded upper housing portion and a molded casing. The rigid-flex PCB is mounted into the upper housing portion such that standard metal contacts disposed on an upper surface of the rigid-flex PCB are exposed through openings defined the upper housing portion, and such that the flexible section of the rigid-flex PCB over any contours formed on the inside surface of the upper housing portion. The molded casing is then formed by depositing thermoset plastic over the lower surface of rigid-flex PCB.

Abstract: A Serial Advanced Technology Attachment-based (SATA-based) flash memory device configured for coupling with a host machine. The device includes semiconductor memory configured for storing data and a plug having therein a plug cavity, the plug cavity having a generally L shape cavity for housing a set of SATA industry-standard signal pins in respective industry-standard positions with respect to the plug cavity. The plug additionally has a set of power pins that includes at least a first power pin. The SATA-based flash memory device employs a SATA protocol for exchanging the data with the host machine using the set of SATA industry-standard signal pins, the SATA-based flash memory device obtaining power via the set of power pins.

Abstract: High performance flash memory devices (FMD) are described. According to one exemplary embodiment of the invention, a high performance FMD includes an I/O interface, a FMD controller, and at least one non-volatile memory module along with corresponding at least one channel controller. The I/O interface is configured to connect the high performance FMD to a host computing device The FMD contoller is configured to control data transfer (e.g., data reading, data writing/programming, and data erasing) operations between the host computing device and the non-volatile memory module. The at least one non-volatile memory module, comprising one or more non-volatile memory chips, is configured as a secondary storage for the host computing device. The at least one channel controller is configured to ensure proper and efficient data transfer between a set of data buffers located in the FMD controller and the at least one non-volatile memory module.

Abstract: An electronic data flash card includes a processor and at least one flash memory device. The flash memory is partitioned such that it includes a first partition that is formatted using a file system that supports an Autorun function (e.g., CD-ROM file system (CDFS) format, fixed-disk format or Universal Disk Format (UDF)), and a disk partition that is formatted using a typical controller-based flash device file system (e.g., 16-bit File Allocation Table (FAT16) file system, 32-bit FAT (FAT32) file system, or New Technology File System (NTFS)). The electronic data flash card is produced such that Autorun-enabled application automatically executes a predetermined application or action when the electronic data flash card is installed in a host system. In one embodiment, the Autorun application includes an advertisement displayed on the host system prior to allowing access to data stored in the disk partition.

Abstract: A Multi-Media Card/Secure Digital (MMC/SD) single-chip flash device contains a MMC/SD flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. MMC/SD transactions from a host MMC/SD bus are read by a bus transceiver on the MMC/SD flash microcontroller. Various routines that execute on a CPU in the MMC/SD flash microcontroller are activated in response to commands in the MMC/SD transactions. A flash-memory controller in the MMC/SD flash microcontroller transfers data from the bus transceiver to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.

Abstract: A light-weight flash hard drive includes a printed circuit board assembly (PCBA) mounted in a housing formed by a plastic frame and a pair of metal panels that are mounted on the plastic frame over the PCBA. The PCBA includes a PC board and a plug connector that is mounted on a front edge of the PCB. The plastic frame includes first and second parallel side rails and a back end rail extending between back ends of the first and second side rails. The frame defines an open front end and a longitudinal platform for receiving and supporting the PCBA such that the plug connector is exposed through the open front end. The metal panels are either snap-coupled to the plastic frame or to each other. Alternatively, or in addition, an adhesive or insulating film is provided between the metal panels and the IC devices mounted on the PCBA.

Abstract: An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

Abstract: A low-profile Universal-Serial-Bus (USB) device includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips include, for example, a USB controller chip and a flash memory chip, or a single-chip (combined USB controller/flash memory) chip. Multiple flash IC chips are optionally stacked to increase storage capacity. The IC chip(s) are attached to the PCB by wire bonding or other chip-on-board (COB) technique. The passive components are attached by conventional surface mount technology (SMT) techniques. A molded housing is then formed over the IC chips and passive components such that the device has a uniform thickness. The low-profile USB device is optionally used as a modular insert that is mounted onto a metal case to provide a USB assembly having a plug shell similar to a standard USB male connector.

Abstract: An electronic data flash card accessible by a host computer, includes a flash memory controller connected to a flash memory device, and an input-output interface circuit activated to establish a communication with the host. In an embodiment, the flash card uses a USB interface circuit for communication with the host. A flash memory controller includes an arbitrator for mapping logical addresses with physical block addresses, and for performing block management operations including: storing reassigned data to available blocks, relocating valid data in obsolete blocks to said available blocks and reassigning logical block addresses to physical block addresses of said available blocks, finding bad blocks of the flash memory device and replacing with reserve blocks, erasing obsolete blocks for recycling after relocating valid data to available blocks, and erase count wear leveling of blocks, etc. Furthermore, each flash memory device includes an internal buffer for accelerating the block management operations.

Abstract: A light-weight flash hard drive includes a printed circuit board assembly (PCBA) mounted in a housing formed by a plastic frame and a pair of metal panels that are mounted on the plastic frame over the PCBA. The PCBA includes a PC board and a plug connector that is mounted on a front edge of the PCB. The plastic frame includes first and second parallel side rails and a back end rail extending between back ends of the first and second side rails. The frame defines an open front end and a longitudinal platform for receiving and supporting the PCBA such that the plug connector is exposed through the open front end. The metal panels are either snap-coupled to the plastic frame or to each other. Alternatively, or in addition, an adhesive or insulating film is provided between the metal panels and the IC devices mounted on the PCBA.

Abstract: One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.

Abstract: A secure flash-card reader reads a user ID from a secure card and finds a matching entry with a hashed password in a user table on the reader. An encrypted key is received from a secure host that hashes and encrypts a password the user types into the host and the user's ID. A card decryption engine uses a random number to decrypt the encrypted key and recover the hashed password and user ID from the secure host, which is compared by a comparator to the hashed password and user ID from the user table. A mismatch causes an access controller to block access to encrypted data on the secure card. Flash data is transferred over a flash-serial buffer bus between flash-card controllers and a RAM buffer. An encryption engine on the flash-serial buffer bus encrypts and decrypts data and connects to a serial engine to the host.

Abstract: A portable media player receives encrypted audio files and an encrypted content key from a central license server on the Internet. The media player supports digital rights management (DRM) by storing the encrypted audio file in its flash memory and disabling copying or playing of the audio file after a copy limit has been reached. The copy limit is a rule that is combined with the content key in a transfer key that can be encrypted together by the license server. The license server can detect cloning of the media player by reading a unique player ID from the player and detecting when too many accounts use the same unique player ID. The content key can be generated from polar coordinates of the unique player ID, player manufacturer, and song genre. A fingerprint sensor on the player can scan and compare the user's fingerprints to further detect cloning.

Abstract: A flash-memory cache card caches data that a host writes to a hard disk drive. A flash-memory array has physical blocks of flash memory arranged into first and second data areas having M blocks each, and a wear-leveling-counter pool. An incoming logical sector address (LSA) from a host is mapped to one of M entries in a RAM lookup table using a hash of modulo M. The RAM entry stores a mapping to a physical block in a foreground area that is either the first or the second data area. Pages in the physical block are read for a matching LSA that indicates a cache hit. Full pages are written back to the hard disk and erased in the background while the other data area becomes the foreground area. A new physical block with a low wear-level count is selected from blocks in the new foreground area.

Abstract: A Multi-Media Card/Secure Digital (MMC/SD) single-chip flash device contains a MMC/SD flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. MMC/SD transactions from a host MMC/SD bus are read by a bus transceiver on the MMC/SD flash microcontroller. Various routines that execute on a CPU in the MMC/SD flash microcontroller are activated in response to commands in the MMC/SD transactions. A flash-memory controller in the MMC/SD flash microcontroller transfers data from the bus transceiver to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.

Abstract: A system and method for implementing a flash memory system. The flash memory system includes a processor and at least one flash memory device. The at least one flash memory device includes a plurality of partitions. As a result, the flash memory system can utilize the multiple partitions to provide multiple functions such as an AutoRun feature.

Abstract: A socket having thirteen contact springs arranged in a manner that supports existing MMC and SD form factors, and also supports a combination SD/MMC flash memory card. The combination memory card includes a PCB assembly that is consistent with existing 13-pad MMC mechanical form factors, and a housing that is consistent with the SD mechanical form factor, thereby providing a single PCBA and housing arrangement that can be used to produce both MMC and SD memory cards. The thirteen contact pads support all MMC and SD contact pad patterns, but are modified to facilitate a write protect switch. The contacts springs of the socket are arranged to make contact with the modified pad pattern, but to also be backward compatible with existing SD and MMC form factors. A system including the socket and combination SD/MMC flash memory card is also disclosed.

Abstract: Systems and methods for communicating using various protocols through the Secured Digital (SD) physical interface are disclosed. The invention covers, among others, single-mode and multi-mode hosts, single-mode and multi-mode devices, as well as techniques for initializing these hosts and devices in order to facilitate the aforementioned communication.