Patents by Inventor I-Li CHEN
I-Li CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11923413Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate. The semiconductor structure further includes a gate structure surrounding the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure further includes a contact formed over the source/drain structure and extending into the source/drain structure.Type: GrantFiled: February 7, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ta-Chun Lin, Kuo-Hua Pan, Jhon-Jhy Liaw, Chao-Ching Cheng, Hung-Li Chiang, Shih-Syuan Huang, Tzu-Chiang Chen, I-Sheng Chen, Sai-Hooi Yeong
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Publication number: 20240071834Abstract: A method of manufacturing a semiconductor device includes forming a plurality of fin structures extending in a first direction over a semiconductor substrate. Each fin structure includes a first region proximate to the semiconductor substrate and a second region distal to the semiconductor substrate. An electrically conductive layer is formed between the first regions of a first adjacent pair of fin structures. A gate electrode structure is formed extending in a second direction substantially perpendicular to the first direction over the fin structure second region, and a metallization layer including at least one conductive line is formed over the gate electrode structure.Type: ApplicationFiled: November 7, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Li CHIANG, Chih-Liang CHEN, Tzu-Chiang CHEN, I-Sheng CHEN, Lei-Chun CHOU
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Publication number: 20220352020Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas.Type: ApplicationFiled: June 30, 2022Publication date: November 3, 2022Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11410880Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.Type: GrantFiled: April 23, 2019Date of Patent: August 9, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
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Publication number: 20210193517Abstract: The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.Type: ApplicationFiled: March 8, 2021Publication date: June 24, 2021Inventors: Pin-Wen Chen, Chia-Han Lai, Chih-Wei Chang, Mei-Hui Fu, Ming-Hsing Tsai, Wei-Jung Lin, Yu-Shih Wang, Ya-Yi Cheng, I-Li Chen
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Patent number: 10943823Abstract: The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.Type: GrantFiled: October 16, 2019Date of Patent: March 9, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Pin-Wen Chen, Chia-Han Lai, Chih-Wei Chang, Mei-Hui Fu, Ming-Hsing Tsai, Wei-Jung Lin, Yu Shih Shih Wang, Ya-Yi Cheng, I-Li Chen
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Publication number: 20200343135Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.Type: ApplicationFiled: April 23, 2019Publication date: October 29, 2020Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
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Publication number: 20200343087Abstract: The present disclosure describes a method that includes forming a dielectric layer over a contact region on a substrate; etching the dielectric layer to form a contact opening to expose the contact region; and pre-cleaning the exposed contact region to remove a residual material formed by the etching. During the pre-cleaning, the contact region is exposed to an inductively coupled radio frequency (RF) plasma. Also, during the pre-cleaning, a direct current power supply unit (DC PSU) provides a bias voltage to the substrate and a magnetic field is applied to the inductively coupled RF plasma to collimate ions.Type: ApplicationFiled: July 13, 2020Publication date: October 29, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Ting Lin, Chen-Yuan Kao, Rueijer Lin, Yu-Sheng Wang, I-Li Chen, Hong-Ming Wu
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Patent number: 10714329Abstract: The present disclosure describes a method that includes forming a dielectric layer over a contact region on a substrate; etching the dielectric layer to form a contact opening to expose the contact region; and pre-cleaning the exposed contact region to remove a residual material formed by the etching. During the pre-cleaning, the first contact region is exposed to an inductively coupled radio frequency (RF) plasma. Also, during the pre-cleaning, a direct current power supply unit (DC PSU) provides a bias voltage to the substrate and a magnetic field is applied to the inductively coupled RF plasma to collimate ions.Type: GrantFiled: September 28, 2018Date of Patent: July 14, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Ting Lin, Chen-Yuan Kao, Rueijer Lin, Yu-Sheng Wang, I-Li Chen, Hong-Ming Wu
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Publication number: 20200105519Abstract: The present disclosure describes a method that includes forming a dielectric layer over a contact region on a substrate; etching the dielectric layer to form a contact opening to expose the contact region; and pre-cleaning the exposed contact region to remove a residual material formed by the etching. During the pre-cleaning, the first contact region is exposed to an inductively coupled radio frequency (RF) plasma. Also, during the pre-cleaning, a direct current power supply unit (DC PSU) provides a bias voltage to the substrate and a magnetic field is applied to the inductively coupled RF plasma to collimate ions.Type: ApplicationFiled: September 28, 2018Publication date: April 2, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Ting LIN, Chen-Yuan KAO, Rueijer LIN, Yu-Sheng WANG, I-Li CHEN, Hong-Ming WU
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Publication number: 20200051858Abstract: The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.Type: ApplicationFiled: October 16, 2019Publication date: February 13, 2020Inventors: Pin-Wen Chen, Chia-Han Lai, Chih-Wei Chang, Mei-Hui Fu, Ming-Hsing Tsai, Wei-Jung Lin, Yu Shih Shih Wang, Ya-Yi Cheng, I-Li Chen
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Patent number: 10475702Abstract: The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.Type: GrantFiled: March 14, 2018Date of Patent: November 12, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Pin-Wen Chen, Chia-Han Lai, Chih-Wei Chang, Mei-Hui Fu, Ming-Hsing Tsai, Wei-Jung Lin, Yu Shih Wang, Ya-Yi Cheng, I-Li Chen
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Publication number: 20190287851Abstract: The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.Type: ApplicationFiled: March 14, 2018Publication date: September 19, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Pin-Wen CHEN, Chia-Han LAI, Chih-Wei CHANG, Mei-Hui FU, Ming-Hsing TSAI, Wei-Jung LIN, Yu Shih WANG, Ya-Yi CHENG, I-Li CHEN