Abstract: A semiconductor device includes a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, a MTJ on the MRAM region, a metal interconnection on the MTJ, and a blocking layer on the metal interconnection. Preferably, the blocking layer includes a stripe pattern according to a top view and the blocking layer could include metal or a dielectric layer.

Abstract: An example embodiment of the present invention provides processes relating to direct memory access (DMA) for nodes in a distributed shared memory system with virtual storage. The processes in the embodiment relate to DMA read, write, and push operations. In the processes, an initiator node in the system sends a message to the home node where the data for the operation will reside or presently resides, so that the home node can directly receive data from or send data to the target server, which might be a virtual I/O server. The processes employ a distributed shared memory logic circuit that is a component of each node and a connection/communication protocol for sending and receiving packets over a scalable interconnect such as InfiniBand. In the example embodiment, the processes also employ a DMA control block which points to a scatter/gather list and which control block resides in shared memory.