Patents by Inventor I. T. Liu

I. T. Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for forming semiconductor ball grid array package
    Publication number: 20080274569
    Abstract: A method for forming a semiconductor package provides a ball grid array, BGA, formed on a package substrate. The apices of the solder balls of the BGA are all at the same height, even if the package substrate is non-planar. Different solder ball pad sizes are used and tailored to compensate for non-planarity of the package substrate that may result from thermal warpage. Larger size solder ball pads are formed at relatively-high locations on the package substrate. An equal amount of solder is formed on each of the solder ball pads to produce solder balls having different heights and coplanar apices.
    Type: Application
    Filed: July 10, 2008
    Publication date: November 6, 2008
    Inventors: Pei-Haw Tsao, Pao-Kang Niu, Liang-Chen Lin, I. T. Liu
  • SEMICONDUCTOR BALL GRID ARRAY PACKAGE
    Publication number: 20080054455
    Abstract: A semiconductor package provides a ball grid array, BGA, formed on a package substrate. The apices of the solder balls of the BGA are all at the same height, even if the package substrate is non-planar. Different solder ball pad sizes are used and tailored to compensate for non-planarity of the package substrate that may result from thermal warpage. Larger size solder ball pads are formed at relatively-high locations on the package substrate. An equal amount of solder is formed on each of the solder ball pads to produce solder balls having different heights.
    Type: Application
    Filed: August 29, 2006
    Publication date: March 6, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Haw Tsao, Pao-Kang Niu, Liang-Chen Lin, I. T. Liu