Patents by Inventor I-Ting Huang

I-Ting Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12142579
    Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. At least one of the reinforcement pattern layers is embedded in the insulating encapsulation. The reinforcement structure is electrically floating.
    Type: Grant
    Filed: July 18, 2023
    Date of Patent: November 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
  • Publication number: 20240203906
    Abstract: A method for forming a package structure is provided, which includes recessing a substrate to form a trench, disposing a first stacked die package structure over the substrate, forming an underfill layer over the first stacked die package structure and in the trench, and forming a package layer over the underfill layer and in the trench.
    Type: Application
    Filed: February 28, 2024
    Publication date: June 20, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
  • Patent number: 11948896
    Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
  • Publication number: 20230361052
    Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. At least one of the reinforcement pattern layers is embedded in the insulating encapsulation. The reinforcement structure is electrically floating.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
  • Patent number: 11769739
    Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The semiconductor device is disposed on the redistribution circuit structure opposite to the wiring substrate. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is partially embedded in the redistribution circuit structure and is partially embedded in the insulating encapsulation. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. The reinforcement structure is electrically floating.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
  • Publication number: 20220359430
    Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 10, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
  • Patent number: 11476205
    Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure. The first stacked die package structure includes a plurality of memory dies. The underfill layer is over the first stacked die package structure. The underfill layer includes a first protruding portion that extends below a top surface of the through substrate via structure. The package layer is over the underfill layer. The package layer has a second protruding portion that extends below the top surface of the through substrate via structure.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: October 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
  • Publication number: 20220262745
    Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The semiconductor device is disposed on the redistribution circuit structure opposite to the wiring substrate. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is partially embedded in the redistribution circuit structure and is partially embedded in the insulating encapsulation. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. The reinforcement structure is electrically floating.
    Type: Application
    Filed: May 9, 2022
    Publication date: August 18, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
  • Patent number: 11355454
    Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has a first surface and a second surface opposite to the first surface. The wiring substrate is disposed on the first surface of the redistribution circuit structure. The semiconductor device is disposed on the second surface of the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is directly in contact with the insulating encapsulation.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: June 7, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
  • Publication number: 20220037266
    Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has a first surface and a second surface opposite to the first surface. The wiring substrate is disposed on the first surface of the redistribution circuit structure. The semiconductor device is disposed on the second surface of the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is directly in contact with the insulating encapsulation.
    Type: Application
    Filed: July 30, 2020
    Publication date: February 3, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
  • Publication number: 20210167024
    Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure. The first stacked die package structure includes a plurality of memory dies. The underfill layer is over the first stacked die package structure. The underfill layer includes a first protruding portion that extends below a top surface of the through substrate via structure. The package layer is over the underfill layer. The package layer has a second protruding portion that extends below the top surface of the through substrate via structure.
    Type: Application
    Filed: February 9, 2021
    Publication date: June 3, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
  • Patent number: 10923438
    Abstract: A package structure and method for forming the same are provided. The method includes forming a through substrate via structure in a substrate, and forming a first trench in the substrate. The method includes stacking a first stacked die package structure over the substrate using a plurality of first bonding structures. The first bonding structures are between the substrate and the first stacked die package structure, and a there is plurality of cavities between two adjacent first bonding structures. The method also includes forming an underfill layer over the first stacked die package structure and in the cavities, and the underfill layer is formed in a portion of the first trench. The method further includes forming a package layer over the underfill layer.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: February 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
  • Patent number: 10849426
    Abstract: The present disclosure provides a rear structure coupled to a display panel. The rear structure comprises a rear cover comprising a rib structure for supporting the display panel, the rib structure comprising a plurality of horizontal bars, a plurality of vertical bars, and a plurality of blocks, and each of the blocks formed by at least one of the horizontal bars and at least one of the vertical bars. Wherein a first section of the rib structure comprises at least two aligned adjacent horizontal bars and at least two aligned adjacent vertical bars, and a second section of the rib structure comprises at least two non-aligned vertical bars.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: December 1, 2020
    Assignees: ShenZhen Hongfei Precision Technology Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Wen-Pin Wang, Yao-Shih Chung, I-Ting Huang, Yu-Jen Chang, Hai-Ping Xiang, Hui Huang, Xiu-Gao Yang, Dong-Ping Zhang, Yong Yang, Hui Zhang, Bo Hu, Qin Sun
  • Publication number: 20200343198
    Abstract: A package structure and method for forming the same are provided. The method includes forming a through substrate via structure in a substrate, and forming a first trench in the substrate. The method includes stacking a first stacked die package structure over the substrate using a plurality of first bonding structures. The first bonding structures are between the substrate and the first stacked die package structure, and a there is plurality of cavities between two adjacent first bonding structures. The method also includes forming an underfill layer over the first stacked die package structure and in the cavities, and the underfill layer is formed in a portion of the first trench. The method further includes forming a package layer over the underfill layer.
    Type: Application
    Filed: April 26, 2019
    Publication date: October 29, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
  • Publication number: 20190208651
    Abstract: The present disclosure provides a rear structure coupled to a display panel. The rear structure comprises a rear cover comprising a rib structure for supporting the display panel, the rib structure comprising a plurality of horizontal bars, a plurality of vertical bars, and a plurality of blocks, and each of the blocks formed by at least one of the horizontal bars and at least one of the vertical bars. Wherein a first section of the rib structure comprises at least two aligned adjacent horizontal bars and at least two aligned adjacent vertical bars, and a second section of the rib structure comprises at least two non-aligned vertical bars.
    Type: Application
    Filed: January 3, 2019
    Publication date: July 4, 2019
    Inventors: Wen-Pin Wang, Yao-Shih Chung, I-Ting Huang, Yu-Jen Chang, Hai-Ping Xiang, Hui Huang, Xiu-Gao Yang, Dong-Ping Zhang, Yong Yang, Hui Zhang, Bo Hu, Qin Sun
  • Patent number: 10338434
    Abstract: A back-light module includes a back board. The back board includes a substrate and a plurality of frame monomers. Each frame monomer comprises four lateral ribs, every two adjacent lateral ribs are perpendicularly connected with each other. The frame monomers are detachably assembled to each other to form a height adjustable back frame, and the height adjustable back frame is assembled with the substrate to form a height adjustable light-mixing chamber.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: July 2, 2019
    Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: I-Ting Huang, Cheng-Fa Chung, Yue-Han Chen, Chih-Hsien Chen
  • Publication number: 20180143493
    Abstract: A back-light module includes a back board. The back board includes a substrate and a plurality of frame monomers. Each frame monomer comprises four lateral ribs, every two adjacent lateral ribs are perpendicularly connected with each other. The frame monomers are detachably assembled to each other to form a height adjustable back frame, and the height adjustable back frame is assembled with the substrate to form a height adjustable light-mixing chamber.
    Type: Application
    Filed: April 27, 2017
    Publication date: May 24, 2018
    Inventors: I-TING HUANG, CHENG-FA CHUNG, YUE-HAN CHEN, CHIH-HSIEN CHEN
  • Patent number: 9964789
    Abstract: A liquid crystal display device thermally insulated from light source heat, includes a display panel, a backlight module positioned on the display panel, a bezel positioned around the backlight module, and a thermal insulating element mounted on the bezel. The backlight module includes a light guiding plate and at least one light source located at a side of the light guiding plate. The thermal insulating element is positioned between the at least one light source and the bezel. A sealed space is formed between the thermal insulating element and the bezel. The thermal insulating element and the sealed vacuum space are configured to thermally insulate heat generated by the at least one light source and prevent heat from transferring to the bezel and display panel.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: May 8, 2018
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Cheng-Fa Chung, I-Ting Huang, Yue-Han Chen, Chih-Hsien Chen
  • Patent number: 9891372
    Abstract: A backlight module includes a light guiding plate having a side surface, at least one light source facing towards the light guiding plate, and a thermal insulation element. The thermal insulation element is configured to prevent heat from the at least one light source from transferring to the bezel and display panel. The thermal insulation element is coupled to the side surface. The at least one light source is enclosed by the light guiding plate and the thermal insulation element.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: February 13, 2018
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chih-Hsien Chen, Cheng-Fa Chung, Yue-Han Chen, I-Ting Huang
  • Publication number: 20170343850
    Abstract: A liquid crystal display device thermally insulated from light source heat, includes a display panel, a backlight module positioned on the display panel, a bezel positioned around the backlight module, and a thermal insulating element mounted on the bezel. The backlight module includes a light guiding plate and at least one light source located at a side of the light guiding plate. The thermal insulating element is positioned between the at least one light source and the bezel. A sealed space is formed between the thermal insulating element and the bezel. The thermal insulating element and the sealed vacuum space are configured to thermally insulate heat generated by the at least one light source and prevent heat from transferring to the bezel and display panel.
    Type: Application
    Filed: October 20, 2016
    Publication date: November 30, 2017
    Inventors: CHENG-FA CHUNG, I-TING HUANG, YUE-HAN CHEN, CHIH-HSIEN CHEN