Patents by Inventor I-Ting Huang
I-Ting Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12142579Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. At least one of the reinforcement pattern layers is embedded in the insulating encapsulation. The reinforcement structure is electrically floating.Type: GrantFiled: July 18, 2023Date of Patent: November 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
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Publication number: 20240203906Abstract: A method for forming a package structure is provided, which includes recessing a substrate to form a trench, disposing a first stacked die package structure over the substrate, forming an underfill layer over the first stacked die package structure and in the trench, and forming a package layer over the underfill layer and in the trench.Type: ApplicationFiled: February 28, 2024Publication date: June 20, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
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Patent number: 11948896Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.Type: GrantFiled: July 26, 2022Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
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Publication number: 20230361052Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. At least one of the reinforcement pattern layers is embedded in the insulating encapsulation. The reinforcement structure is electrically floating.Type: ApplicationFiled: July 18, 2023Publication date: November 9, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
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Patent number: 11769739Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The semiconductor device is disposed on the redistribution circuit structure opposite to the wiring substrate. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is partially embedded in the redistribution circuit structure and is partially embedded in the insulating encapsulation. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. The reinforcement structure is electrically floating.Type: GrantFiled: May 9, 2022Date of Patent: September 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
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Publication number: 20220359430Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.Type: ApplicationFiled: July 26, 2022Publication date: November 10, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
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Patent number: 11476205Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure. The first stacked die package structure includes a plurality of memory dies. The underfill layer is over the first stacked die package structure. The underfill layer includes a first protruding portion that extends below a top surface of the through substrate via structure. The package layer is over the underfill layer. The package layer has a second protruding portion that extends below the top surface of the through substrate via structure.Type: GrantFiled: February 9, 2021Date of Patent: October 18, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
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Publication number: 20220262745Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has dielectric layers. The wiring substrate is disposed on the redistribution circuit structure. The semiconductor device is disposed on the redistribution circuit structure opposite to the wiring substrate. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is partially embedded in the redistribution circuit structure and is partially embedded in the insulating encapsulation. The reinforcement structure includes reinforcement pattern layers and reinforcement vias. The reinforcement pattern layers and the dielectric layers are stacked alternately. The reinforcement vias penetrate through the dielectric layers to connect the reinforcement pattern layers. The reinforcement structure is electrically floating.Type: ApplicationFiled: May 9, 2022Publication date: August 18, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
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Patent number: 11355454Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has a first surface and a second surface opposite to the first surface. The wiring substrate is disposed on the first surface of the redistribution circuit structure. The semiconductor device is disposed on the second surface of the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is directly in contact with the insulating encapsulation.Type: GrantFiled: July 30, 2020Date of Patent: June 7, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
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Publication number: 20220037266Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has a first surface and a second surface opposite to the first surface. The wiring substrate is disposed on the first surface of the redistribution circuit structure. The semiconductor device is disposed on the second surface of the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is directly in contact with the insulating encapsulation.Type: ApplicationFiled: July 30, 2020Publication date: February 3, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Fu Tsai, Shih-Ting Lin, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang
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Publication number: 20210167024Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure. The first stacked die package structure includes a plurality of memory dies. The underfill layer is over the first stacked die package structure. The underfill layer includes a first protruding portion that extends below a top surface of the through substrate via structure. The package layer is over the underfill layer. The package layer has a second protruding portion that extends below the top surface of the through substrate via structure.Type: ApplicationFiled: February 9, 2021Publication date: June 3, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
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Patent number: 10923438Abstract: A package structure and method for forming the same are provided. The method includes forming a through substrate via structure in a substrate, and forming a first trench in the substrate. The method includes stacking a first stacked die package structure over the substrate using a plurality of first bonding structures. The first bonding structures are between the substrate and the first stacked die package structure, and a there is plurality of cavities between two adjacent first bonding structures. The method also includes forming an underfill layer over the first stacked die package structure and in the cavities, and the underfill layer is formed in a portion of the first trench. The method further includes forming a package layer over the underfill layer.Type: GrantFiled: April 26, 2019Date of Patent: February 16, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
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Patent number: 10849426Abstract: The present disclosure provides a rear structure coupled to a display panel. The rear structure comprises a rear cover comprising a rib structure for supporting the display panel, the rib structure comprising a plurality of horizontal bars, a plurality of vertical bars, and a plurality of blocks, and each of the blocks formed by at least one of the horizontal bars and at least one of the vertical bars. Wherein a first section of the rib structure comprises at least two aligned adjacent horizontal bars and at least two aligned adjacent vertical bars, and a second section of the rib structure comprises at least two non-aligned vertical bars.Type: GrantFiled: January 3, 2019Date of Patent: December 1, 2020Assignees: ShenZhen Hongfei Precision Technology Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Wen-Pin Wang, Yao-Shih Chung, I-Ting Huang, Yu-Jen Chang, Hai-Ping Xiang, Hui Huang, Xiu-Gao Yang, Dong-Ping Zhang, Yong Yang, Hui Zhang, Bo Hu, Qin Sun
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Publication number: 20200343198Abstract: A package structure and method for forming the same are provided. The method includes forming a through substrate via structure in a substrate, and forming a first trench in the substrate. The method includes stacking a first stacked die package structure over the substrate using a plurality of first bonding structures. The first bonding structures are between the substrate and the first stacked die package structure, and a there is plurality of cavities between two adjacent first bonding structures. The method also includes forming an underfill layer over the first stacked die package structure and in the cavities, and the underfill layer is formed in a portion of the first trench. The method further includes forming a package layer over the underfill layer.Type: ApplicationFiled: April 26, 2019Publication date: October 29, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Fu TSAI, Kung-Chen YEH, I-Ting HUANG, Shih-Ting LIN, Szu-Wei LU
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Publication number: 20190208651Abstract: The present disclosure provides a rear structure coupled to a display panel. The rear structure comprises a rear cover comprising a rib structure for supporting the display panel, the rib structure comprising a plurality of horizontal bars, a plurality of vertical bars, and a plurality of blocks, and each of the blocks formed by at least one of the horizontal bars and at least one of the vertical bars. Wherein a first section of the rib structure comprises at least two aligned adjacent horizontal bars and at least two aligned adjacent vertical bars, and a second section of the rib structure comprises at least two non-aligned vertical bars.Type: ApplicationFiled: January 3, 2019Publication date: July 4, 2019Inventors: Wen-Pin Wang, Yao-Shih Chung, I-Ting Huang, Yu-Jen Chang, Hai-Ping Xiang, Hui Huang, Xiu-Gao Yang, Dong-Ping Zhang, Yong Yang, Hui Zhang, Bo Hu, Qin Sun
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Patent number: 10338434Abstract: A back-light module includes a back board. The back board includes a substrate and a plurality of frame monomers. Each frame monomer comprises four lateral ribs, every two adjacent lateral ribs are perpendicularly connected with each other. The frame monomers are detachably assembled to each other to form a height adjustable back frame, and the height adjustable back frame is assembled with the substrate to form a height adjustable light-mixing chamber.Type: GrantFiled: April 27, 2017Date of Patent: July 2, 2019Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: I-Ting Huang, Cheng-Fa Chung, Yue-Han Chen, Chih-Hsien Chen
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Publication number: 20180143493Abstract: A back-light module includes a back board. The back board includes a substrate and a plurality of frame monomers. Each frame monomer comprises four lateral ribs, every two adjacent lateral ribs are perpendicularly connected with each other. The frame monomers are detachably assembled to each other to form a height adjustable back frame, and the height adjustable back frame is assembled with the substrate to form a height adjustable light-mixing chamber.Type: ApplicationFiled: April 27, 2017Publication date: May 24, 2018Inventors: I-TING HUANG, CHENG-FA CHUNG, YUE-HAN CHEN, CHIH-HSIEN CHEN
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Patent number: 9964789Abstract: A liquid crystal display device thermally insulated from light source heat, includes a display panel, a backlight module positioned on the display panel, a bezel positioned around the backlight module, and a thermal insulating element mounted on the bezel. The backlight module includes a light guiding plate and at least one light source located at a side of the light guiding plate. The thermal insulating element is positioned between the at least one light source and the bezel. A sealed space is formed between the thermal insulating element and the bezel. The thermal insulating element and the sealed vacuum space are configured to thermally insulate heat generated by the at least one light source and prevent heat from transferring to the bezel and display panel.Type: GrantFiled: October 20, 2016Date of Patent: May 8, 2018Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Cheng-Fa Chung, I-Ting Huang, Yue-Han Chen, Chih-Hsien Chen
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Patent number: 9891372Abstract: A backlight module includes a light guiding plate having a side surface, at least one light source facing towards the light guiding plate, and a thermal insulation element. The thermal insulation element is configured to prevent heat from the at least one light source from transferring to the bezel and display panel. The thermal insulation element is coupled to the side surface. The at least one light source is enclosed by the light guiding plate and the thermal insulation element.Type: GrantFiled: October 20, 2016Date of Patent: February 13, 2018Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Chih-Hsien Chen, Cheng-Fa Chung, Yue-Han Chen, I-Ting Huang
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Publication number: 20170343850Abstract: A liquid crystal display device thermally insulated from light source heat, includes a display panel, a backlight module positioned on the display panel, a bezel positioned around the backlight module, and a thermal insulating element mounted on the bezel. The backlight module includes a light guiding plate and at least one light source located at a side of the light guiding plate. The thermal insulating element is positioned between the at least one light source and the bezel. A sealed space is formed between the thermal insulating element and the bezel. The thermal insulating element and the sealed vacuum space are configured to thermally insulate heat generated by the at least one light source and prevent heat from transferring to the bezel and display panel.Type: ApplicationFiled: October 20, 2016Publication date: November 30, 2017Inventors: CHENG-FA CHUNG, I-TING HUANG, YUE-HAN CHEN, CHIH-HSIEN CHEN