Patents by Inventor I. Wang

I. Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250123552
    Abstract: An extreme ultraviolet (EUV) mask and method of forming an EUV mask are provided. The method includes forming a mask layer on a semiconductor wafer, generating extreme ultraviolet (EUV) light by a lithography exposure system, forming patterned EUV light by patterning the EUV light by a mask including an absorber having extinction coefficient at an EUV wavelength that exceeds extinction coefficients of TaBN and TaN at the EUV wavelength, and exposing the mask layer by the patterned EUV light.
    Type: Application
    Filed: April 5, 2024
    Publication date: April 17, 2025
    Inventors: Pei-Cheng HSU, Hsuan-I WANG, Ping-Hsun LIN, Ching-Fang YU, Chia-Jen CHEN, Hsin-Chang LEE
  • Publication number: 20250126904
    Abstract: A metal grid of a pixel array may be patterned with different sized openings over photodiodes. As a result, a uniform pixel array of photodiodes with different sensitivities may be formed. For example, the pixel array may include low-sensitivity photodiodes (LSPDs), mid-sensitivity photodiodes (MSPDs), and high-sensitivity photodiodes (HSPDs). The LSPDs, MSPDs, and HSPDs have different capture rates. Therefore, a higher dynamic range is achieved by combining signals from LSPDs, MSPDs, and HSPDs. For example, the pixel array may achieve a dynamic range of approximately 140 decibels or higher due to its increased capacity. Additionally, the pixel array exhibits better dark performance as compared to a pixel array with a combination of large photodiodes (LPDs) and small photodiodes (SPDs). Because each photodiode in the pixel array is approximately a same size, photodiode leakage is reduced as compared with irregular pixel arrays including a combination of LPDs and SPDs.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 17, 2025
    Inventors: Chih-Ping CHANG, Ming-I WANG, Shyh-Fann TING
  • Publication number: 20250120324
    Abstract: A magnetoresistive random access memory (MRAM) includes a pillar structure having a bottom electrode and a magnetic tunnel junction (MTJ) having a reference layer, a free layer and a tunnel barrier disposed between the reference layer and the free layer. The MTJ is disposed on the bottom electrode. A top electrode is disposed on the MTJ. The top electrode includes two or more tiers wherein each tier successively includes a smaller footprint.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 10, 2025
    Inventors: Oscar van der Straten, Chih-Chao Yang, Ashim Dutta, Wu-Chang Tsai, Ailian Zhao, Pei-I Wang, Shravana Kumar Katakam
  • Patent number: 12203266
    Abstract: A construction combination includes a construction member, and an acoustic absorbing device engaged in the construction member for absorbing acoustic sounds. The acoustic absorbing device includes a housing engaged in the construction member, and a casing engaged in the housing. The housing includes one or more couplers, and the casing includes one or more connectors for engaging with the couplers and for anchoring the casing in the housing. A sound absorbing member is engaged in the casing, and the sound absorbing member includes an anchor for engaging with the casing and for anchoring the sound absorbing member in the casing.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: January 21, 2025
    Assignee: WISWONG TECHNOLGOY CORPORATION
    Inventors: Hong Jen Wang, Yu Ming Wang, Kai I Wang
  • Publication number: 20250020829
    Abstract: A telephoto lens assembly including a primary lens sub-assembly having at least one lens, and being operable to collect and focus light to an intermediate focal location. The assembly further includes a secondary lens sub-assembly having at least one refractive lens, and being operable to collect and focus light from the primary lens sub-assembly. The lens assembly also includes a metacorrector positioned relative to the secondary lens sub-assembly and being responsive to the focused light from the secondary lens sub-assembly, where the metacorrector includes a meta-structure that is configured to correct aberrations in the light, provide focusing/defocusing power and/or to remove residual secondary color in the light.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 16, 2025
    Inventors: Philip W.C. Hon, Michael L. Dupuis, Shu-i Wang, Stephane Larouche, Sze Wah Lee, Katherine T. Fountaine
  • Publication number: 20240421377
    Abstract: A battery module is provided. The battery module includes a front lid having a fluid inlet for flowing a fluid into the battery module and a battery case coupled to the front lid and having an accommodation region for accommodating battery cells. The battery case further includes a case frame, one or more inlet channels, and one or more outlet channels. Each of the one or more inlet channels receiving the fluid from the fluid inlet and going through the case frame for flowing the fluid through the battery case further includes one or more inlet slits for flowing the fluid into the accommodation region for cooling the battery cells. Each of the one or more outlet channels going through the case frame for flowing the fluid through the battery case is coupled to the accommodation region for flowing the fluid out of a fluid outlet of the battery module.
    Type: Application
    Filed: June 19, 2023
    Publication date: December 19, 2024
    Inventors: Yu-Chung LIN, Kai-Hsiang TU, TENG-I WANG, TZU-WEN LIAO, YU-SHUN CHI, Shang-Chih Dai
  • Publication number: 20240394048
    Abstract: Techniques for specifying and implementing a software application targeted for execution on a multiprocessor array (MPA). The MPA may include a plurality of processing elements, supporting memory, and a high bandwidth interconnection network (IN), communicatively coupling the plurality of processing elements and supporting memory. In some embodiments, software code may specify one or more cell definitions that include: program instructions executable to perform a function and one or more language constructs. The software code may further instantiate first, second, and third cell instances, each of which is an instantiation of one of the one or more cell definitions, where the instantiation includes configuration of the one or more language constructs such that: the first and second cell instances communicate via respective communication ports and the first and second cell instances are included in the third cell instance.
    Type: Application
    Filed: February 21, 2024
    Publication date: November 28, 2024
    Inventors: Stephen E. Lim, Viet N. Ngo, Jeffrey M. Nicholson, John Mark Beardslee, Teng-I Wang, Zhong Qing Shang, Michael Lyle Purnell
  • Patent number: 12136000
    Abstract: Various embodiments are disclosed of a compilation with optimization for multi-processor system with processing elements optimized for high performance and low power dissipation and an associated method of programming the processing elements. Application source code may be initially compiled into an intermediate representation. Following the initial compilation, resources may be mapped and communication synthesis performed. Simulation and debug may be performed prior to loading an executable image onto the multi-processor system. At each step, checks may be performed for possible optimizations, and one or more steps repeated using results of the checks.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: November 5, 2024
    Assignee: Coherent Logix, Incorporated
    Inventors: Michael L. Purnell, Geoffrey N. Ellis, Teng-I Wang
  • Publication number: 20240355865
    Abstract: An integrated chip including a semiconductor substrate. The semiconductor substrate includes a first region having a first doping type, a second region having a second doping type, different than the first doping type, and a third region having the second doping type. A photodetector is in the semiconductor substrate. The photodetector is formed, at least in part, by the first region and the second region. A first capacitor electrode is over the third region of the semiconductor substrate. The first capacitor electrode includes a semiconductor. A first insulator layer is between the first capacitor electrode and the third region. A capacitor is along the semiconductor substrate. The capacitor is formed, at least in part, by the first capacitor electrode, the third region, and the first insulator layer.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 24, 2024
    Inventors: Chih-Ping Chang, Ming-I Wang, Shyh-Fann Ting
  • Publication number: 20240298555
    Abstract: A semiconductor device that includes a semiconductor substrate, a bottom electrode over the semiconductor substrate, a switching layer over the bottom electrode, a metal ion source layer over the switching layer, and a top electrode over the metal ion source layer. The switching layer includes a compound having aluminum, oxygen, and nitrogen.
    Type: Application
    Filed: March 2, 2023
    Publication date: September 5, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Siang Ruan, Chia-Wen Zhong, Tzu-Yu Lin, Yao-Wen Chang, Ching Ju Yang, Chin I Wang
  • Publication number: 20240233612
    Abstract: The present disclosure provides a display apparatus including an LED array. The display apparatus comprises a light emitting diode (LED) array, a power source, a controller, a PWM switch, and a current source module. The controller is configured to generate a control signal for controlling a first LED column during a scan period. The PWM switch is electrically connected between the first LED column and a second power level. The current source module is electrically connected between the first LED column and the second power level. The current source module is configured to provide a current flow with multiple levels. The PWM switch is controlled based on a first portion of the control signal, and the amount of the current flow provided by the current source module in the scan period depends on a second portion of the control signal.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 11, 2024
    Inventors: Tsun-I WANG, Ching-Chun WU, Chia-Liang YANG
  • Publication number: 20240190948
    Abstract: The disclosure provides anti-DENV antibodies having a cross-reactivity to ZIKV and methods of making and using the same. The anti-DENV antibodies have uses that include treating or preventing ZIKV infection.
    Type: Application
    Filed: December 19, 2023
    Publication date: June 13, 2024
    Inventors: Katja FINK, Cheng-I WANG, Lisa Fong Poh NG, Laurent RENIA, Zenjiro SAMPEI, Xing'er Christine KOO
  • Publication number: 20240183150
    Abstract: A construction combination includes a construction member, and an acoustic absorbing device engaged in the construction member for absorbing acoustic sounds. The acoustic absorbing device includes a housing engaged in the construction member, and a casing engaged in the housing. The housing includes one or more couplers, and the casing includes one or more connectors for engaging with the couplers and for anchoring the casing in the housing. A sound absorbing member is engaged in the casing, and the sound absorbing member includes an anchor for engaging with the casing and for anchoring the sound absorbing member in the casing.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 6, 2024
    Inventors: Hong Jen WANG, Yu Ming WANG, Kai I WANG
  • Patent number: D1044477
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: October 1, 2024
    Assignee: TAIWAN FU HSING INDUSTRIAL CO., LTD.
    Inventors: Jui-I Wang, Fu-Chih Huang
  • Patent number: D1062426
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: February 18, 2025
    Assignee: TAIWAN FU HSING INDUSTRIAL CO., LTD.
    Inventors: Jui-I Wang, Fu-Chih Huang
  • Patent number: D1062427
    Type: Grant
    Filed: February 15, 2023
    Date of Patent: February 18, 2025
    Assignee: TAIWAN FU HSING INDUSTRIAL CO., LTD.
    Inventors: Jui-I Wang, Fu-Chih Huang
  • Patent number: D1062429
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: February 18, 2025
    Assignee: TAIWAN FU HSING INDUSTRIAL CO., LTD.
    Inventors: Jui-I Wang, Fu-Chih Huang
  • Patent number: D1062430
    Type: Grant
    Filed: July 17, 2023
    Date of Patent: February 18, 2025
    Assignee: TAIWAN FU HSING INDUSTRIAL CO., LTD.
    Inventor: Jui-I Wang
  • Patent number: D1068433
    Type: Grant
    Filed: January 23, 2024
    Date of Patent: April 1, 2025
    Assignee: TAIWAN FU HSING INDUSTRIAL CO., LTD.
    Inventor: Jui-I Wang
  • Patent number: D1068442
    Type: Grant
    Filed: September 26, 2023
    Date of Patent: April 1, 2025
    Assignee: TAIWAN FU HSING INDUSTRIAL CO., LTD.
    Inventor: Jui-I Wang