Abstract: A method for use in the manufacture of an electronic circuit comprising at least one substantially planar electronic device is disclosed.

Abstract: A method of manufacturing a structure comprising substantially planar electronic devices comprises providing an active material layer having a plurality of insulative features formed therein. The features at least partly inhibit electrical current flow and define at least a first substantially planar electronic device in the layer having at least first and second terminals comprising an area of the active material layer. A patterned dielectric layer having an exposed surface patterned with at least a first depression arranged over the first terminal is formed over the active material layer. Dielectric material is removed from at least a base of the first depression to expose a first terminal surface and form a hole through the dielectric material to the first terminal. The hole is at least partly filled with electrically conductive material to form an electrical connection to the first terminal. Corresponding structures and electrical circuits are also described and claimed.

Abstract: A method for use in the manufacture of an electronic circuit comprising at least one substantially planar electronic device is disclosed.

Abstract: A method of manufacturing a structure comprising substantially planar electronic devices comprises providing an active material layer having a plurality of insulative features formed therein. The features at least partly inhibit electrical current flow and define at least a first substantially planar electronic device in the layer having at least first and second terminals comprising an area of the active material layer. A patterned dielectric layer having an exposed surface patterned with at least a first depression arranged over the first terminal is formed over the active material layer. Dielectric material is removed from at least a base of the first depression to expose a first terminal surface and form a hole through the dielectric material to the first terminal. The hole is at least partly filled with electrically conductive material to form an electrical connection to the first terminal. Corresponding structures and electrical circuits are also described and claimed.

Abstract: Methods of fabricating large size, high performance multilayer diffraction gratings having a thick substrate that take advantage of reactive ion etching during the fabrication process are provided herein. In one implementation, a method of making a multilayer diffraction grating comprises the steps of: providing a substrate having a thickness of at least 2.0 cm; applying a dielectric structure having a plurality of layers on the semiconductor substrate; depositing a photoresist; exposing the photoresist to a grating pattern; developing the photoresist to produce the grating pattern in the photoresist; and reactive ion etching to transfer the grating pattern to the dielectric structure. In preferred form, the substrate material of the grating is selected to have low electrical resistivity and high thermal conductivity.