Patents by Inventor Ian Bearman

Ian Bearman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240411534
    Abstract: A tool analyzes source code of a program that targets a parallel processing system, and searches for parallelism unstructured behavior values that potentially inhibit parallelism efficiency. Example parallelism unstructured behavior values include particular memory addresses, memory masks, control divergences, and instruction predicates, which are identified according to their context and use in the program. The tool also locates program operations that contribute to these values, and determines a source of parallelism structure information in the program. In some scenarios, the tool populates a pattern data structure which is suitable to help guide code generation. Patterns detected include addressing patterns, mask patterns, and thread control patterns. Programs analyzed include single instruction multiple data programs and single instruction multiple thread programs.
    Type: Application
    Filed: June 6, 2023
    Publication date: December 12, 2024
    Inventors: Haishan ZHU, Ian BEARMAN
  • Publication number: 20060174227
    Abstract: A compiler that forms an intermediate representation of a program using a flow graph with less than all possible edges used to model asynchronous transfers within the program. The flow graph is formed in multiple phases. In one phase, the flow graph is formed without modeling asynchronous transfers. In later phases, representations of the effects of the asynchronous transfers are selectively added. As part of the later phases, edges modeling a possible asynchronous transfer are added to the flow graph following definitions in protected regions of variables that are live outside the protected region. A modified definition of live-ness of a variable is used to incorporate use of the variable in any region, including the protected region, following an asynchronous transfer. Edges from the protected region are also added to the model if the only use of the defined variable is in a handler.
    Type: Application
    Filed: January 18, 2005
    Publication date: August 3, 2006
    Applicant: Microsoft Corporation
    Inventors: Ian Bearman, James Radigan
  • Publication number: 20060161908
    Abstract: A compiler that forms an intermediate representation of a program using a flow graph with less than all possible edges used to model asynchronous transfers within the program. The flow graph is formed in multiple phases. In one phase, the flow graph is formed without modeling asynchronous transfers. In later phases, representations of the effects of the asynchronous transfers are selectively added. As part of the later phases, edges modeling a possible asynchronous transfer are added to the flow graph following definitions in protected regions of variables that are live outside the protected region. A modified definition of live-ness of a variable is used to incorporate use of the variable in any region, including the protected region, following an asynchronous transfer. Edges from the protected region are also added to the model if the only use of the defined variable is in a handler.
    Type: Application
    Filed: January 14, 2005
    Publication date: July 20, 2006
    Applicant: Microsoft Corporation
    Inventors: Ian Bearman, James Radigan