Patents by Inventor Ian C. Laboriante

Ian C. Laboriante has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11763889
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: September 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Publication number: 20220284959
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Application
    Filed: March 28, 2022
    Publication date: September 8, 2022
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Patent number: 11289163
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: March 29, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Publication number: 20210118508
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Application
    Filed: November 2, 2020
    Publication date: April 22, 2021
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Patent number: 10825523
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: November 3, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Publication number: 20200066346
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Application
    Filed: October 29, 2019
    Publication date: February 27, 2020
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Patent number: 10475515
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: November 12, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Publication number: 20190198109
    Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.
    Type: Application
    Filed: December 21, 2017
    Publication date: June 27, 2019
    Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
  • Patent number: 9653307
    Abstract: A surface modification composition comprising a silylation agent comprising a silyl acetamide, a silylation catalyst comprising a perfluoro acid anhydride, an amine-based complexing agent, and an organic solvent. Methods of modifying a silicon-based material and methods of forming high aspect ratio structures on a substrate are also disclosed.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: May 16, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Jerome A. Imonigie, Ian C. Laboriante, Michael T. Andreas, Sanjeev Sapra, Prashant Raghu
  • Publication number: 20150084187
    Abstract: A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed surface comprising titanium atoms. The at least one exposed surface of at least one structure is contacted with at least one of an organo-phosphonic acid and an organo-phosphoric acid to form a material having a hydrophobic surface on the at least one exposed surface of the least one structure. A method of forming a semiconductor device structure and a semiconductor device structure are also described.
    Type: Application
    Filed: December 3, 2014
    Publication date: March 26, 2015
    Inventors: Ian C. Laboriante, Prashant Raghu
  • Patent number: 8932933
    Abstract: A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed surface comprising titanium atoms. The at least one exposed surface of at least one structure is contacted with at least one of an organo-phosphonic acid and an organo-phosphoric acid to form a material having a hydrophobic surface on the at least one exposed surface of the least one structure. A method of forming a semiconductor device structure and a semiconductor device structure are also described.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: January 13, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Ian C. Laboriante, Prashant Raghu
  • Patent number: 8809157
    Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: August 19, 2014
    Assignee: Micron Technology, Inc.
    Inventors: D. V. Nirmal Ramaswamy, Beth R. Cook, Lei Bi, Wayne Huang, Ian C. Laboriante
  • Publication number: 20140106534
    Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 17, 2014
    Applicant: Micron Technology, Inc.
    Inventors: D.V. Nirmal Ramaswamy, Beth R. Cook, Lei Bi, Wayne Huang, Ian C. Laboriante
  • Patent number: 8633084
    Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: January 21, 2014
    Assignee: Micron Technology, Inc.
    Inventors: D. V. Nirmal Ramaswamy, Beth R. Cook, Lei Bi, Wayne Huang, Ian C. Laboriante
  • Publication number: 20130292647
    Abstract: A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed surface comprising titanium atoms. The at least one exposed surface of at least one structure is contacted with at least one of an organo-phosphonic acid and an organo-phosphoric acid to form a material having a hydrophobic surface on the at least one exposed surface of the least one structure. A method of forming a semiconductor device structure and a semiconductor device structure are also described.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 7, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Ian C. Laboriante, Prashant Raghu