Patents by Inventor Ian C. Laboriante
Ian C. Laboriante has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11763889Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: GrantFiled: March 28, 2022Date of Patent: September 19, 2023Assignee: Micron Technology, Inc.Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Publication number: 20220284959Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: ApplicationFiled: March 28, 2022Publication date: September 8, 2022Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Patent number: 11289163Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: GrantFiled: November 2, 2020Date of Patent: March 29, 2022Assignee: Micron Technology, Inc.Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Publication number: 20210118508Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: ApplicationFiled: November 2, 2020Publication date: April 22, 2021Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Patent number: 10825523Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: GrantFiled: October 29, 2019Date of Patent: November 3, 2020Assignee: Micron Technology, Inc.Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Publication number: 20200066346Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: ApplicationFiled: October 29, 2019Publication date: February 27, 2020Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Patent number: 10475515Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: GrantFiled: December 21, 2017Date of Patent: November 12, 2019Assignee: Micron Technology, Inc.Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Publication number: 20190198109Abstract: Some embodiments include apparatuses and methods of forming such apparatuses. One of the apparatus includes first memory cells located in different levels in a first portion of the apparatus, second memory cells located in different levels in a second portion of the apparatus, a switch located in a third portion of the apparatus between the first and second portions, first and second control gates to access the first and second memory cells, an additional control gate located between the first and second control gates to control the switch, a first conductive structure having a thickness and extending perpendicular to the levels in the first portion of the apparatus, a first dielectric structure between the first conductive structure and charge-storage portions of the first memory cells, a second dielectric structure having a second thickness between the second conductive structure and a sidewall of the additional control gate, the second thickness being greater than the first thickness.Type: ApplicationFiled: December 21, 2017Publication date: June 27, 2019Inventors: Benben Li, Akira Goda, Ramey M. Abdelrahaman, Ian C. Laboriante, Krishna K. Parat
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Patent number: 9653307Abstract: A surface modification composition comprising a silylation agent comprising a silyl acetamide, a silylation catalyst comprising a perfluoro acid anhydride, an amine-based complexing agent, and an organic solvent. Methods of modifying a silicon-based material and methods of forming high aspect ratio structures on a substrate are also disclosed.Type: GrantFiled: July 14, 2016Date of Patent: May 16, 2017Assignee: Micron Technology, Inc.Inventors: Jerome A. Imonigie, Ian C. Laboriante, Michael T. Andreas, Sanjeev Sapra, Prashant Raghu
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Publication number: 20150084187Abstract: A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed surface comprising titanium atoms. The at least one exposed surface of at least one structure is contacted with at least one of an organo-phosphonic acid and an organo-phosphoric acid to form a material having a hydrophobic surface on the at least one exposed surface of the least one structure. A method of forming a semiconductor device structure and a semiconductor device structure are also described.Type: ApplicationFiled: December 3, 2014Publication date: March 26, 2015Inventors: Ian C. Laboriante, Prashant Raghu
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Patent number: 8932933Abstract: A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed surface comprising titanium atoms. The at least one exposed surface of at least one structure is contacted with at least one of an organo-phosphonic acid and an organo-phosphoric acid to form a material having a hydrophobic surface on the at least one exposed surface of the least one structure. A method of forming a semiconductor device structure and a semiconductor device structure are also described.Type: GrantFiled: May 4, 2012Date of Patent: January 13, 2015Assignee: Micron Technology, Inc.Inventors: Ian C. Laboriante, Prashant Raghu
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Patent number: 8809157Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.Type: GrantFiled: December 13, 2013Date of Patent: August 19, 2014Assignee: Micron Technology, Inc.Inventors: D. V. Nirmal Ramaswamy, Beth R. Cook, Lei Bi, Wayne Huang, Ian C. Laboriante
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Publication number: 20140106534Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.Type: ApplicationFiled: December 13, 2013Publication date: April 17, 2014Applicant: Micron Technology, Inc.Inventors: D.V. Nirmal Ramaswamy, Beth R. Cook, Lei Bi, Wayne Huang, Ian C. Laboriante
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Patent number: 8633084Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.Type: GrantFiled: October 17, 2012Date of Patent: January 21, 2014Assignee: Micron Technology, Inc.Inventors: D. V. Nirmal Ramaswamy, Beth R. Cook, Lei Bi, Wayne Huang, Ian C. Laboriante
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Publication number: 20130292647Abstract: A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed surface comprising titanium atoms. The at least one exposed surface of at least one structure is contacted with at least one of an organo-phosphonic acid and an organo-phosphoric acid to form a material having a hydrophobic surface on the at least one exposed surface of the least one structure. A method of forming a semiconductor device structure and a semiconductor device structure are also described.Type: ApplicationFiled: May 4, 2012Publication date: November 7, 2013Applicant: Micron Technology, Inc.Inventors: Ian C. Laboriante, Prashant Raghu