Patents by Inventor Ian Carpenter

Ian Carpenter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941615
    Abstract: Method and apparatus for transmitting credentials to a transaction processing system, the credentials arranged in sets and a set including a unique identifier and verification data elements. Credentials are activated and are then available for use in at least one subsequent transaction. In the transaction, in response to receiving authorization from a user, the unique identifier and verification data elements from a set are transmitted to the transaction processing system for the user. The credentials are activated using an activation mode selected from at least a first activation mode and a second activation mode. In the first activation mode, additional user input for the verification data elements associated with the unique identifier is received from the user. In the second activation mode, the user is authenticated, and verification data elements are received via a data communications network are received from a trusted data processing system remote from the user.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: March 26, 2024
    Assignee: VISA EUROPE LIMITED
    Inventors: Paul Michael Carpenter, Jonathan Paul Sumpster, Andrew Paul Thompson, Christopher Ian Abrathat, Jonathan Rusca, Jean-Christophe Gilbert Lacour, Michael Ronald Philpotts
  • Patent number: 11283589
    Abstract: Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: March 22, 2022
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Varun Gupta, Milam Paraschou, Gerald R. Talbot, Gurunath Dollin, Damon Tohidi, Eric Ian Carpenter, Chad S. Gallun, Jeffrey Cooper, Hanwoo Cho, Thomas H. Likens, III, Scott F. Dow, Michael J. Tresidder
  • Patent number: 11263285
    Abstract: An improved process for recreating a webpage as presented to the visitor is provided. A skeleton of a webpage, including content and images of the webpage, may be captured for each web event. For each web event, the captured skeleton of the webpage, including the content and the image of the captured webpage, may be transmitted to a server, allowing the server to recreate a webpage that was presented to the visitor.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: March 1, 2022
    Assignee: Lead Intelligence, Inc.
    Inventors: Matt Butt, Ian Carpenter, Alexander Martin, Emanuel I. Wald, Jason Watt
  • Publication number: 20210271728
    Abstract: An improved process for recreating a webpage as presented to the visitor is provided. A skeleton of a webpage, including content and images of the webpage, may be captured for each web event. For each web event, the captured skeleton of the webpage, including the content and the image of the captured webpage, may be transmitted to a server, allowing the server to recreate a webpage that was presented to the visitor.
    Type: Application
    Filed: May 18, 2021
    Publication date: September 2, 2021
    Applicant: Lead Intelligence, Inc.
    Inventors: Matt Butt, Ian Carpenter, Alexander Martin, Emanuel I. Wald, Jason Watt
  • Publication number: 20210111861
    Abstract: Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 15, 2021
    Inventors: Varun Gupta, Milam Paraschou, Gerald R. Talbot, Gurunath Dollin, Damon Tohidi, Eric Ian Carpenter, Chad S. Gallun, Jeffrey Cooper, Hanwoo Cho, Thomas H. Likens, III, Scott F. Dow, Michael J. Tresidder
  • Patent number: 10873445
    Abstract: Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: December 22, 2020
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Varun Gupta, Milam Paraschou, Gerald R. Talbot, Gurunath Dollin, Damon Tohidi, Eric Ian Carpenter, Chad S. Gallun, Jeffrey Cooper, Hanwoo Cho, Thomas H. Likens, III, Scott F. Dow, Michael J. Tresidder
  • Publication number: 20200344039
    Abstract: Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations.
    Type: Application
    Filed: December 10, 2019
    Publication date: October 29, 2020
    Inventors: Varun Gupta, Milam Paraschou, Gerald R. Talbot, Gurunath Dollin, Damon Tohidi, Eric Ian Carpenter, Chad S. Gallun, Jeffrey Cooper, Hanwoo Cho, Thomas H. Likens, III, Scott F. Dow, Michael J. Tresidder
  • Patent number: 10581587
    Abstract: Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: March 3, 2020
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Varun Gupta, Milam Paraschou, Gerald R. Talbot, Gurunath Dollin, Damon Tohidi, Eric Ian Carpenter, Chad S. Gallun, Jeffrey Cooper, Hanwoo Cho, Thomas H. Likens, III, Scott F. Dow, Michael J. Tresidder
  • Publication number: 20190317977
    Abstract: An improved process for recreating a webpage as presented to the visitor is provided. A skeleton of a webpage, including content and images of the webpage, may be captured for each web event. For each web event, the captured skeleton of the webpage, including the content and the image of the captured webpage, may be transmitted to a server, allowing the server to recreate a webpage that was presented to the visitor.
    Type: Application
    Filed: June 13, 2019
    Publication date: October 17, 2019
    Inventors: Matt BUTT, Ian CARPENTER, Alexander MARTIN, Emanuel I. WALD, Jason WATT
  • Patent number: 10366140
    Abstract: An improved process for recreating a webpage as presented to the visitor is provided. A skeleton of a webpage, including content and images of the webpage, may be captured for each web event. For each web event, the captured skeleton of the webpage, including the content and the image of the captured webpage, may be transmitted to a server, allowing the server to recreate a webpage that was presented to the visitor.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: July 30, 2019
    Inventors: Matt Butt, Ian Carpenter, Alexander Martin, Emanuel I Wald, Jason Watt
  • Publication number: 20150278384
    Abstract: An improved process for recreating a webpage as presented to the visitor is provided. A skeleton of a webpage, including content and images of the webpage, may be captured for each web event. For each web event, the captured skeleton of the webpage, including the content and the image of the captured webpage, may be transmitted to a server, allowing the server to recreate a webpage that was presented to the visitor.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Applicant: Lead Intelligence, Inc.
    Inventors: Matt Butt, Ian Carpenter, Alexander Martin, Emanuel I Wald, Jason Watt