Abstract: High-power battery architecture comprising unique anode and cathode conductive means procuring improved battery life.

Abstract: A battery-type of electrochemical device including a unit stack formed by at least one unit cell, an electrical connection support, made at least in part of a conductive material, provided near a first frontal face of the unit stack, electrical insulation means enabling two distant regions of the electrical connection support to be insulated from one another, anode contact means enabling a first lateral face of the unit stack to be electrically connected to the electrical connection support, cathode contact means enabling a second lateral face of the unit stack to be electrically connected to the electrical connection support, an encapsulation system covering the other frontal face of the unit stack, the anode contact means, the cathode contact means, and at least in part the face of the electrical connection support that is facing the unit stack, and a mechanical stiffening system covering the encapsulation system opposite the electrical connection support.

Abstract: Thin-film batteries that include a novel encapsulation system.

Abstract: A battery including a stack alternating between at least one anode and at least one cathode, a primary encapsulation system covering some of the faces of the stack, at least one anode contact member operable to make electrical contact between the stack and an external conductive element, and at least one cathode contact member operable to make an electrical contact between the stack and an external conductive element. An additional encapsulation system includes two frontal regions respectively covering a respective frontal region of the primary encapsulation system and two lateral regions which cover a respective lateral region devoid of any contact member of the primary encapsulation system. Each of the two frontal regions of the additional encapsulation system further cover the frontal ends respectively of the anode contact members and the cathode contact members.

Abstract: Thin-film batteries having a novel encapsulation system.

Abstract: Electrolyte compositions comprising lithium hexafluorophosphate, lithium 4,5-dicyano-2-(trifluoromethyl)imidazolate, a solvent, and at least one electrolytic additive, are herein described. The present application also describes the use if these electrolyte compositions in batteries, e.g. within a temperature range higher than or equal to 25° C.

Abstract: A method for self-supported transfer of a fine layer, in which at least one species of ions is implanted in a source-substrate at a specified depth in relation to the surface of the source-substrate. A stiffener is applied in intimate contact with the source-substrate and the source-substrate undergoes a heat treatment at a specified temperature during a specified period of time in order to create an embrittled buried area substantially at the specified depth without causing a thin layer, defined between the surface and the embrittled buried layer in relation to the remainder of the source-substrate, to become thermally detached. A controlled localized energy pulse is applied to the source-substrate in order to cause the self-supported detachment of the thin layer.

Abstract: The invention relates to semiconductor-on-insulator structure and its method of manufacture. This structure includes a substrate, a thin, useful surface layer and an insulating layer positioned between the substrate and surface layer. The insulating layer is at least one dielectric layer of a high k material having a permittivity that is higher than that of silicon dioxide and a capacitance that is substantially equivalent to that of a layer of silicon dioxide having a thickness of less than or equal to 30 nm.

Abstract: The present invention relates to a method of treating a structure produced from semiconductor materials, wherein the structure includes a first and second substrates defining a common interface that has defects. The method includes forming a layer, called the disorganized layer, which includes the interface, in which at least a part of the crystal lattice is disorganized; and reorganizing the crystal lattice of the disorganized layer in order to force the defects back deeper into the first substrate.

Abstract: The invention relates to a method of catastrophic transfer of a thin film including implanting in a source substrate a first species of ions or gas at a given depth and a second species of ions or gas, the first species being adapted to generate defects and the second species being adapted to occupy those defects. The process further includes applying a stiffener in intimate contact with the source substrate, applying a heat treatment to that source substrate, at a given temperature for a given time, so as to create, substantially at the given depth, a buried weakened zone, without initiating the thermal splitting of a thin film, and applying a localized amount of energy, for example mechanical stresses, to that source substrate so as to provoke the catastrophic splitting of a thin film, the thin film having a substantially planar face opposite to the face surface of the source substrate.

Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.

Abstract: The invention relates to semiconductor-on-insulator structure and its method of manufacture. This structure includes a substrate, a thin, useful surface layer and an insulating layer positioned between the substrate and surface layer. The insulating layer is at least one dielectric layer of a high k material having a permittivity that is higher than that of silicon dioxide and a capacitance that is substantially equivalent to that of a layer of silicon dioxide having a thickness of less than or equal to 30 nm.

Abstract: The invention relates to a of manufacturing a silicon dioxide layer of low roughness, that includes depositing a layer of silicon dioxide over a substrate by a low pressure chemical vapor deposition (LPCVD) process, the deposition process employing simultaneously a flow of tetraethylorthosilicate (TEOS) as the source material for the film deposition and a flow of a diluant gas that it not reactive with TEOS, so that the diluant gas/TEOS flow ratio is between 0.5 and 100; and annealing the silicon dioxide layer at a temperature between 600° C. and 1200° C., for a duration between 10 minutes and 6 hours.

Abstract: A method of fabricating a structure that includes at least one semiconductor material for applications in microelectronics, optoelectronics or optics. The method includes transferring, onto a support made of a first material, a thin monocrystalline layer made of a second material that differs from the first material, and performing a predetermined heat treatment carrying out at least one strengthening step on a bonding interface between the thin layer and the support. The thickness of the thin layer is selected as a function of the difference between the coefficients of thermal expansion of the first and second materials and as a function of parameters of predetermined heat treatment, such that the stresses exerted by the heat treatment on the assembly of the support and the transferred thin layer leaves the assembly intact. The method further includes depositing an additional thickness of the second material in the monocrystalline state on the thin layer to thicken it.

Abstract: The present invention relates to a method of manufacturing a wafer comprising a single crystalline bulk substrate of a first material and at least one epitaxial layer of a second material which has a lattice different from the lattice of the first material. The present invention provides a method for manufacturing a wafer in which a layer which is lattice-mismatched with the substrate can be grown on the substrate with a high effectiveness and high quality at a low cost. A roughening step is included for roughening the surface of the bulk substrate and a growing step is included for growing the second material on the rough surface with a reduced number of threading dislocations and an enhanced strain relaxation compared to a second material that is epitaxially grown on a polished surface.

Abstract: The invention relates to a method of producing a film intended for applications in electronics, optics or optronics starting from an initial wafer, which includes a step of implanting atomic species through one of the faces of the wafer. This method includes forming a step of defined height around the periphery of the wafer, with the step having a mean thickness that is less than that of the wafer; and selectively implanting atomic species through a face of the wafer but not through the step to form an implanted zone at a defined implant depth with the film being defined between the face of the wafer and the implanted zone. The implantation of atomic species into the step can be prevented by forming a protective layer at least over the step or by masking the step. The invention also relates to a wafer obtainable by the method.

Abstract: The present invention relates to a method of treating a structure produced from semiconductor materials, wherein the structure includes a first and second substrates defining a common interface that has defects. The method includes forming a layer, called the disorganized layer, which includes the interface, in which at least a part of the crystal lattice is disorganized; and reorganizing the crystal lattice of the disorganized layer in order to force the defects back deeper into the first substrate.

Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.

Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.

Abstract: The present invention relates to a method of manufacturing a wafer comprising a single crystalline bulk substrate of a first material and at least one epitaxial layer of a second material which has a lattice different from the lattice of the first material. The present invention provides a method for manufacturing a wafer in which a layer which is lattice-mismatched with the substrate can be grown on the substrate with a high effectiveness and high quality at a low cost. A roughening step is included for roughening the surface of the bulk substrate and a growing step is included for growing the second material on the rough surface with a reduced number of threading dislocations and an enhanced strain relaxation compared to a second material that is epitaxially grown on a polished surface.