Patents by Inventor Ian Chesal
Ian Chesal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10025678Abstract: Systems and methods are provided for any party in a cloud ecosystem (cloud providers of such resources, the intermediate management software for such resources, and the end user of such resources) to detect and resolve faulty resources synchronously or asynchronously, before said faults adversely affect the users' workloads. The system requests a service or set of one or more resources within a cloud, automatically checking the infrastructure for various faults that would cause it to be non-functional, including pre-defined and user-defined checks, and resolving them before including the infrastructure in the working service cluster of resources. The system presents an API to the user that returns only functional, production-quality resources that are not in a faulty state. An API that tests and resolves bad infrastructure can be registered during the request or a preceding/subsequent API call, removing the need for the end-user to deal with various types of infrastructure faults.Type: GrantFiled: August 24, 2015Date of Patent: July 17, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Ian Alderman, Chris M. Chalfant, Ian Chesal, Douglas Clayton, S. Robert Futrick, Daniel Harris, Andrew Kaczorek, Jason Stowe, Adrian Johnson, Ben Watrous, David Watrous, Archit Kulshrestha
-
Publication number: 20150363281Abstract: Systems and methods are provided for any party in a cloud ecosystem (cloud providers of such resources, the intermediate management software for such resources, and the end user of such resources) to detect and resolve faulty resources synchronously or asynchronously, before said faults adversely affect the users' workloads. The system requests a service or set of one or more resources within a cloud, automatically checking the infrastructure for various faults that would cause it to be non-functional, including pre-defined and user-defined checks, and resolving them before including the infrastructure in the working service cluster of resources. The system presents an API to the user that returns only functional, production-quality resources that are not in a faulty state. An API that tests and resolves bad infrastructure can be registered during the request or a preceding/subsequent API call, removing the need for the end-user to deal with various types of infrastructure faults.Type: ApplicationFiled: August 24, 2015Publication date: December 17, 2015Applicant: Cycle Computing, LLCInventors: Ian Alderman, Chris M. Chalfant, Ian Chesal, Douglas Clayton, S. Robert Futrick, Daniel Harris, Andrew Kaczorek, Jason Stowe, Adrian Johnson, Ben Watrous, David Watrous, Archit Kulshrestha
-
Patent number: 9146840Abstract: Systems and methods are provided for any party in a cloud ecosystem (cloud providers of such resources, the intermediate management software for such resources, and the end user of such resources) to detect and resolve faulty resources synchronously or asynchronously, before said faults adversely affect the users' workloads. The system requests a service or set of one or more resources within a cloud, automatically checking the infrastructure for various faults that would cause it to be non-functional, including pre-defined and user-defined checks, and resolving them before including the infrastructure in the working service cluster of resources. The system presents an API to the user that returns only functional, production-quality resources that are not in a faulty state. An API that tests and resolves bad infrastructure can be registered during the request or a preceding/subsequent API call, removing the need for the end-user to deal with various types of infrastructure faults.Type: GrantFiled: June 17, 2013Date of Patent: September 29, 2015Assignee: Cycle Computing, LLCInventors: Ian Alderman, Chris M. Chalfant, Ian Chesal, Douglas Clayton, S. Robert Futrick, Daniel Harris, Andrew Kaczorek, Jason Stowe, Adrian Johnson, Ben Watrous, David Watrous, Archit Kulshrestha
-
Publication number: 20140006844Abstract: Systems and methods are provided for any party in a cloud ecosystem (cloud providers of such resources, the intermediate management software for such resources, and the end user of such resources) to detect and resolve faulty resources synchronously or asynchronously, before said faults adversely affect the users' workloads. The system requests a service or set of one or more resources within a cloud, automatically checking the infrastructure for various faults that would cause it to be non-functional, including pre-defined and user-defined checks, and resolving them before including the infrastructure in the working service cluster of resources. The system presents an API to the user that returns only functional, production-quality resources that are not in a faulty state. An API that tests and resolves bad infrastructure can be registered during the request or a preceding/subsequent API call, removing the need for the end-user to deal with various types of infrastructure faults.Type: ApplicationFiled: June 17, 2013Publication date: January 2, 2014Inventors: Ian Alderman, Chris Chalfant, Ian Chesal, Doug Clayton, Rob Futrick, Dan Harris, Andrew Kaczorek, Jason Stowe, Adrian Johnson, Ben Watrous, Dave Watrous, Archit Kulshrestha
-
Patent number: 8037435Abstract: The time and computational resources needed to evaluate the potential input parameter settings in a design space is decreased by determining probabilities of improvement for input parameter settings in the design space and eliminating input parameter values that have low probabilities of improvement from the design space prior to compilation. The probability of improvement for input parameter settings is an estimate of the likelihood that the compilation of the user design using the set of input parameter settings will improve the performance of the user design with respect to one or more design goals, such as timing, power, or resource usage. The probability of improvement for input parameter settings can be determined from an analysis of the compilation results of sample designs, from attributes and/or constraints of the user design, and/or from a correlation between the results of optimization algorithms applied to the user design.Type: GrantFiled: May 6, 2008Date of Patent: October 11, 2011Assignee: Altera CorporationInventors: Ian Chesal, Terry Borer
-
Patent number: 7594208Abstract: Techniques for optimizing the placement and synthesis of a circuit design on a programmable integrated circuit are provided. The performance of a circuit design is analyzed after it has been compiled with different values for selected input parameters. The input parameter values that produce the best results for an output metric are then chosen to synthesis and place the circuit design on the programmable integrated circuit. In one embodiment, the values of the output metrics are averaged for all test compiles that share the same input parameters, but different seeds. In another embodiment, the compile with the best output metrics, as determined by the user, are selected. These techniques allow a user to automatically trade off compile-time to get a better-optimized circuit.Type: GrantFiled: December 13, 2006Date of Patent: September 22, 2009Assignee: Altera CorporationInventors: Terry Borer, Ian Chesal, James Schleicher, David Mendel, Mike Hutton, Boris Ratchev, Yaska Sankar, Babette van Antwerpen, Gregg Baeckler, Richard Yuan, Stephen Brown, Vaughn Betz, Kevin Chan
-
Patent number: 7594204Abstract: A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes identifying a group of components associated with a critical signal in the system. A first copy and a second copy of the group of components are generated where the first copy is driven by a first signal at a first state and the second copy is driven by a second signal at a second state. The system is configured to select an output of one of the first copy and the second copy in response to the critical signal.Type: GrantFiled: October 6, 2003Date of Patent: September 22, 2009Assignee: Altera CorporationInventors: Deshanand Singh, Paul McHardy, Chris Sanford, Gabriel Quan, Terry Borer, Ian Chesal, Valavan Manohararajah, Ivan Hamer, Stephen D. Brown
-
Patent number: 7389489Abstract: Techniques are provided for converting a circuit design file so that it is compatible with a new programmable IC. Black box declarations and instances of black boxes in the circuit design file are located automatically. Then, information about the function and structure of the black boxes is gathered from various user files. This information is used to convert the black box declarations and instances into equivalent declarations and instances that are compatible with the new programmable IC. The design conversion process is performed quickly and automatically with minimal user input. User input is only needed to identify recognized black boxes.Type: GrantFiled: May 5, 2004Date of Patent: June 17, 2008Assignee: Altera CorporationInventors: Ian Chesal, Kevin Chan, Subianto Windoro, Minh Mac, Terry Borer, Stephen Brown, Irene Sujanto, Sheac Yee Lim
-
Patent number: 7370295Abstract: The time and computational resources needed to evaluate the potential input parameter settings in a design space is decreased by determining probabilities of improvement for input parameter settings in the design space and eliminating input parameter values that have low probabilities of improvement from the design space prior to compilation. The probability of improvement for input parameter settings is an estimate of the likelihood that the compilation of the user design using the set of input parameter settings will improve the performance of the user design with respect to one or more design goals, such as timing, power, or resource usage. The probability of improvement for input parameter settings can be determined from an analysis of the compilation results of sample designs, from attributes and/or constraints of the user design, and/or from a correlation between the results of optimization algorithms applied to the user design.Type: GrantFiled: July 21, 2005Date of Patent: May 6, 2008Assignee: Altera CorporationInventors: Ian Chesal, Terry Borer
-
Patent number: 7360190Abstract: A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes identifying registers on near-critical paths. The registers are moved to shorten lengths of one or more near-critical paths.Type: GrantFiled: June 25, 2004Date of Patent: April 15, 2008Assignee: Altera CorporationInventors: Deshanand Singh, Gabriel Quan, Terry Borer, Ian Chesal, Valavan Manohararajah, Karl Schabas, Stephen Brown
-
Patent number: 7181703Abstract: Techniques for optimizing the placement and synthesis of a circuit design on a programmable integrated circuit are provided. The performance of a circuit design is analyzed after it has been compiled with different values for selected input parameters. The input parameter values that produce the best results for an output metric are then chosen to synthesis and place the circuit design on the programmable integrated circuit. In one embodiment, the values of the output metrics are averaged for all test compiles that share the same input parameters, but different seeds. In another embodiment, the compile with the best output metrics, as determined by the user, are selected. These techniques allow a user to automatically trade off compile-time to get a better-optimized circuit.Type: GrantFiled: July 22, 2003Date of Patent: February 20, 2007Assignee: Altera CorporationInventors: Terry Borer, Ian Chesal, James Schleicher, David Mendel, Mike Hutton, Boris Ratchev, Yaska Sankar, Babette van Antwerpen, Gregg Baeckler, Richard Yuan, Stephen Brown, Vaughn Betz, Kevin Chan