Patents by Inventor Ian G. Colloff

Ian G. Colloff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9019961
    Abstract: Method and system for transmitting a multicast message with one or more packets to a plurality of destinations is provided. The system includes an adapter including an entry port to receive the multicast message from a source for transmission to the plurality of destinations; one or more egress ports of the adapter that transmit one or more packets of the multicast message to the plurality of destinations and receives acknowledgement for the one or more packets from the one or more destinations; and a message manager that monitors the delivery status for one or more packets to the plurality of destinations without using a plurality of dedicated individual connections between each of the plurality of destinations and the source.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: April 28, 2015
    Assignee: Intel Corporation
    Inventors: Ian G. Colloff, Lloyd Dickman, Thomas R. Prohofsky, James A. Kunz
  • Patent number: 8780902
    Abstract: A method for balancing load on a network by selecting a path based on a load balancing algorithm and assigning one of several pairs of endpoint addresses for a flow based on the path selected. One pair of endpoint addresses corresponds to a first path and another pair of endpoint addresses corresponds to a second path. If the first path is selected, the first pair of endpoint addresses is assigned to the flow. If the second path is selected, the second pair of endpoint addresses is assigned to the flow. In one embodiment, based on the assigned pair of endpoint address, the flow is switched to an endpoint by the selected path.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: July 15, 2014
    Assignee: Intel Corporation
    Inventors: Ian G. Colloff, Gregory B. Lindahl, Thomas M. Mcwilliams
  • Patent number: 8761020
    Abstract: A switch element and a method for routing packets in an IB Multi Level switch and network is provided. The method includes determining if alternate routing is enabled for a packet; determining an alternate route address for the packet, if alternate routing is enabled; and routing the packet using the alternate route address, if the alternate route address is valid. The switch element includes a routing table in a port that determines a base route address; and if alternate routing is enabled for a packet, the port determines an alternate route address for a packet; and routes the packet using the alternate route address.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: June 24, 2014
    Assignee: Intel Corporation
    Inventors: Frank R. Dropps, Ian G. Colloff, James A. Kunz, Ernest G. Kohlwey
  • Publication number: 20130266009
    Abstract: Method and system for transmitting a multicast message with one or more packets to a plurality of destinations is provided. The system includes an adapter including an entry port to receive the multicast message from a source for transmission to the plurality of destinations; one or more egress ports of the adapter that transmit one or more packets of the multicast message to the plurality of destinations and receives acknowledgement for the one or more packets from the one or more destinations; and a message manager that monitors the delivery status for one or more packets to the plurality of destinations without using a plurality of dedicated individual connections between each of the plurality of destinations and the source.
    Type: Application
    Filed: May 31, 2013
    Publication date: October 10, 2013
    Inventors: Ian G. Colloff, Lloyd Dickman, Thomas R. Prohefsky, James A. Kunz
  • Patent number: 8477779
    Abstract: Method and system for transmitting a multicast message with one or more packets to a plurality of destinations is provided. The system includes an adapter including an entry port to receive the multicast message from a source for transmission to the plurality of destinations; one or more egress ports of the adapter that transmit one or more packets of the multicast message to the plurality of destinations and receives acknowledgement for the one or more packets from the one or more destinations; and a message manager that monitors the delivery status for one or more packets to the plurality of destinations without using a plurality of dedicated individual connections between each of the plurality of destinations and the source.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: July 2, 2013
    Assignee: Intel Corporation
    Inventors: Ian G. Colloff, Lloyd Dickman, Thomas R. Prohofsky, James A. Kunz
  • Patent number: 8411677
    Abstract: An adapter for decoding information packet of a layered information transfer protocol received over a link is disclosed. The information packet is arranged in one or more predetermined layered protocol format and includes a payload data. The adapter includes a receive filter bank configured to process a portion of the information packet and assemble the payload data in a predetermined interconnect format. An adapter for encoding a payload data and destination information for the payload data received over an interconnect is also disclosed. The payload data is arranged in one or more predetermined interconnect format. The adapter includes a send filter bank configured to process a portion of the payload data and assemble the payload data with the destination information in a predetermined layered protocol format.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: April 2, 2013
    Assignee: QLOGIC, Corporation
    Inventor: Ian G. Colloff
  • Patent number: 8089971
    Abstract: Method and system for network communication between a first port and second port using plurality virtual lanes provided. The method includes: (a) configuring a threshold value for each of the plurality of virtual lanes; wherein the threshold value defines an amount of data that has to be moved from a receive segment of the second port, before a flow control packet is sent by the second port to the first port; (b) setting a timer value for each of the plurality of virtual lanes; wherein a flow control packet is sent by the second port after the timer expires; (c) monitoring the amount of data removed from the receive segment of the second port; and (c) sending a flow control packet if the amount of data exceeds the threshold value or if the timer set in step (b) has expired.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: January 3, 2012
    Assignee: QLOGIC, Corporation
    Inventors: James A. Kunz, Ian G. Colloff, William J. Gustafson
  • Patent number: 8050260
    Abstract: A switch element and a method for routing packets in an IB Multi Level switch and network is provided. The method includes determining if alternate routing is enabled for a packet; determining an alternate route address for the packet, if alternate routing is enabled; and routing the packet using the alternate route address, if the alternate route address is valid. The switch element includes a routing table in a port that determines a base route address; and if alternate routing is enabled for a packet, the port determines an alternate route address for a packet; and routes the packet using the alternate route address.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: November 1, 2011
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Ian G. Colloff, James A. Kunz, Ernest G. Kohlwey
  • Patent number: 7936753
    Abstract: Method and system for transmitting a multicast message with one or more packets to a plurality of destinations is provided. The system includes an adapter including an entry port to receive the multicast message from a source for transmission to the plurality of destinations; one or more egress ports of the adapter that transmit one or more packets of the multicast message to the plurality of destinations and receives acknowledgement for the one or more packets from the one or more destinations; and a message manager that monitors the delivery status for one or more packets to the plurality of destinations without using a plurality of dedicated individual connections between each of the plurality of destinations and the source.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: May 3, 2011
    Assignee: QLOGIC, Corporation
    Inventors: Ian G. Colloff, Lloyd Dickman, Thomas R. Prohofsky, James A. Kunz
  • Patent number: 7903557
    Abstract: A method for balancing load on a network by selecting a path based on a load balancing algorithm and assigning one of several pairs of endpoint addresses for a flow based on the path selected. One pair of endpoint addresses corresponds to a first path and another pair of endpoint addresses corresponds to a second path. If the first path is selected, the first pair of endpoint addresses is assigned to the flow. If the second path is selected, the second pair of endpoint addresses is assigned to the flow. In one embodiment, based on the assigned pair of endpoint address, the flow is switched to an endpoint by the selected path.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: March 8, 2011
    Assignee: QLOGIC, Corporation
    Inventors: Ian G. Colloff, Gregory B. Lindahl, Thomas M. McWilliams
  • Patent number: 7764676
    Abstract: Method and system for processing packets received from a network is provided. The system includes an adapter having a processing module that separates a header of a network packet from data, forwards the header to a host system and stores data associated with the network packet in a memory device of the network adapter. The host system processes the header and determines a destination for the network packet data. The method includes determining header boundary in a network packet, wherein an adapter coupled to a host system determines the header boundary; ending header information to the host system; and storing data associated with the network packet in a memory device of the adapter.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: July 27, 2010
    Assignee: QLOGIC, Corporation
    Inventors: Lloyd I. Dickman, Ian G. Colloff
  • Patent number: 7643505
    Abstract: Method and system for compressing a data packet is provided. The method includes receiving a data packet; comparing the data packet with content stored in a history module; wherein plural comparisons are performed in parallel; generating a plurality of masks based on the comparisons; comparing the plurality of masks; selecting one of the plurality of masks, based on the mask comparison; and generating a compression record, wherein the compression record includes; size of a data packet, an address field, a mask field and data; and a data packet header includes a control bit indicating if the data packet is compressed.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: January 5, 2010
    Assignee: QLOGIC, Corporation
    Inventor: Ian G. Colloff
  • Patent number: 6950394
    Abstract: A method of facilitating data transfers through a communication network. The method includes forwarding a first data set received from a first interconnect device to a processor. The first data set has transfer instructions and routing instructions associated therewith. The routing instructions specify a destination for the first data set. The method further includes extracting the transfer instructions at the processor and generating a first routing request for the first data set according to the transfer instructions to transfer the first data set to a second interconnect device. The second interconnect device is capable of routing the first data set to the destination. The first routing request has no association to the routing instructions.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: September 27, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Norman Cho-Chun Chou, Ian G. Colloff, Laura Sennett
  • Patent number: 5530834
    Abstract: A cache memory contains a number of RAMs. The RAMs are addressed by independent hashing functions, so as to access a set of locations, one in each RAM. If the required data item is resident in the addressed set, it is accessed. Otherwise, the least-recently used location in the set is selected for overwriting with data from main memory. The contents of the RAM location that is about to be overwritten are saved, and then used to access the memory again in order to address a further set of locations. If any of this further set of locations is less recently used than the saved contents, the saved contents are loaded back into that location.
    Type: Grant
    Filed: March 3, 1994
    Date of Patent: June 25, 1996
    Assignee: International Computers Limited
    Inventors: Ian G. Colloff, Albert S. Hilditch