Patents by Inventor Ian Gresham
Ian Gresham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11949164Abstract: Register banks are used to allow for fast beam switching in a phased array system. Each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: GrantFiled: January 27, 2023Date of Patent: April 2, 2024Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20230275363Abstract: Register banks are used to allow for fast beam switching in a phased array system. Each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: January 27, 2023Publication date: August 31, 2023Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Patent number: 11652267Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.Type: GrantFiled: July 7, 2021Date of Patent: May 16, 2023Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid
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Patent number: 11637371Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.Type: GrantFiled: June 30, 2021Date of Patent: April 25, 2023Assignee: Anokiwave, Inc.Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
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Publication number: 20220013922Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: September 23, 2021Publication date: January 13, 2022Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20210344099Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.Type: ApplicationFiled: July 7, 2021Publication date: November 4, 2021Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid
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Publication number: 20210328345Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.Type: ApplicationFiled: June 30, 2021Publication date: October 21, 2021Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
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Patent number: 11133603Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: GrantFiled: November 16, 2020Date of Patent: September 28, 2021Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Patent number: 11081792Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.Type: GrantFiled: March 7, 2019Date of Patent: August 3, 2021Assignee: Anokiwave, Inc.Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
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Patent number: 11082079Abstract: Exemplary embodiments dynamically select the LO frequency and mixer mode (i.e., low-side LO injection or high-side LO injection) for upconversion based on the desired RF output frequency in order to mitigate the effects of spurious and LO leakage signals that could violate radiation emission limits, e.g., in the case where the IF signal frequency is smaller than the RF operating band. By dynamically switching the LO frequency and mixer mode as a function of the requested operating RF channel, low-level emissions and spurious signal compliance with restricted bands can be achieved.Type: GrantFiled: August 6, 2020Date of Patent: August 3, 2021Assignee: ANOKIWAVE, INC.Inventors: Robert Ian Gresham, Shmuel Ravid, Kristian N. Madsen, Tissana T. Kijsanayotin
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Patent number: 11063336Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.Type: GrantFiled: April 4, 2019Date of Patent: July 13, 2021Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid
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Publication number: 20210075125Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: November 16, 2020Publication date: March 11, 2021Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20210044316Abstract: Exemplary embodiments dynamically select the LO frequency and mixer mode (i.e., low-side LO injection or high-side LO injection) for upconversion based on the desired RF output frequency in order to mitigate the effects of spurious and LO leakage signals that could violate radiation emission limits, e.g., in the case where the IF signal frequency is smaller than the RF operating band. By dynamically switching the LO frequency and mixer mode as a function of the requested operating RF channel, low-level emissions and spurious signal compliance with restricted bands can be achieved.Type: ApplicationFiled: August 6, 2020Publication date: February 11, 2021Inventors: Robert Ian Gresham, Shmuel Ravid, Kristian N. Madsen, Tissana T. Kijsanayotin
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Patent number: 10862222Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be preprogrammed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: GrantFiled: June 10, 2019Date of Patent: December 8, 2020Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. Mcmorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20200350677Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.Type: ApplicationFiled: March 7, 2019Publication date: November 5, 2020Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
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Patent number: 10742288Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.Type: GrantFiled: December 14, 2018Date of Patent: August 11, 2020Assignee: ANOKIWAVE, INC.Inventors: Robert J. McMorrow, Vipul Jain, Wade C. Allen, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Nitin Jain
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Patent number: 10608756Abstract: A system and a method for calibrating an output signal of an antenna is disclosed. In one aspect, an apparatus includes a first digital adder configured to generate a gain offset by at least adding gain calibration data from non-volatile memory and gain command data from static memory. The apparatus further includes an amplitude gain circuit configured to modify, based at least in part on the gain offset, an amplitude of a first output signal of a first antenna. The modified amplitude of the first output signal is provided to enable pre-calibration of the first output signal. The apparatus further includes a power detector configured to measure an output power of the first output signal. The apparatus further includes at least one processor configured to generate a difference between the measured and expected output power, and adjust gain command data in response to the generated difference.Type: GrantFiled: September 5, 2018Date of Patent: March 31, 2020Assignee: ANOKIWAVE, INC.Inventors: Vipul Jain, Robert Ian Gresham, Robert McMorrow, David Warren Corman, Nitin Jain
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Publication number: 20200076515Abstract: A system and a method for calibrating an output signal of an antenna is disclosed. In one aspect, an apparatus includes a first digital adder configured to generate a gain offset by at least adding gain calibration data from non-volatile memory and gain command data from static memory. The apparatus further includes an amplitude gain circuit configured to modify, based at least in part on the gain offset, an amplitude of a first output signal of a first antenna. The modified amplitude of the first output signal is provided to enable pre-calibration of the first output signal. The apparatus further includes a power detector configured to measure an output power of the first output signal. The apparatus further includes at least one processor configured to generate a difference between the measured and expected output power, and adjust gain command data in response to the generated difference.Type: ApplicationFiled: September 5, 2018Publication date: March 5, 2020Inventors: Vipul Jain, Robert Ian Gresham, Robert McMorrow, David Warren Corman, Nitin Jain
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Publication number: 20190312359Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: June 10, 2019Publication date: October 10, 2019Inventors: Kristian N. MADSEN, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20190312330Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.Type: ApplicationFiled: April 4, 2019Publication date: October 10, 2019Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid