Patents by Inventor Ian Huang

Ian Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240101533
    Abstract: The present disclosure relates to methods and intermediates useful for preparing a compound of formula I: or a co-crystal, solvate, salt or combination thereof.
    Type: Application
    Filed: June 5, 2023
    Publication date: March 28, 2024
    Inventors: Kevin McCormack Allan, Amanda Lynn Vandehey, Gediminas Brizgys, Sachin Dhar, Ian James Doxsee, Alex Goldberg, Lars V. Heumann, Zilin Huang, Nathaniel Thomas Kadunce, Shahrokh Kazerani, Willard Lew, Vinh Xuan Ngo, Brian Michael O`Keefe, Trevor James Rainey, Benjamin James Roberts, Bing Shi, Dietrich P. Steinhuebel, Winston C. Tse, Anna Michelle Wagner, Xianghong Wang, Scott Alan Wolckenhauer, Chloe Yuyi Wong, Jennifer R. Zhang
  • Publication number: 20240096548
    Abstract: An electronic device is disclosed. The electronic device can include a core having a top core section and a bottom core section, a laminate substrate, where the laminate substrate having a void through which the top and bottom core sections are connected, and the laminate substrate having conductive traces. The electronic device can further include a base having a first side including a recess and a second side opposite the first site, at least one of the core and the laminate substrate disposed in the recess of the base, where the base has one or more terminals on the second side to electrically connect to an external device.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Inventors: IAN YAN, WINDY HUANG, LARRY GAO, BOHR WAN
  • Patent number: 11934916
    Abstract: An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: March 19, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Jiun-Yun Li, Shih-Yuan Chen, Yao-Chun Chang, Ian Huang, Chiung-Yu Chen
  • Patent number: 11922220
    Abstract: Embodiments of systems, apparatuses and methods provide enhanced function as a service (FaaS) to users, e.g., computer developers and cloud service providers (CSPs). A computing system configured to provide such enhanced FaaS service include one or more controls architectural subsystems, software and orchestration subsystems, network and storage subsystems, and security subsystems. The computing system executes functions in response to events triggered by the users in an execution environment provided by the architectural subsystems, which represent an abstraction of execution management and shield the users from the burden of managing the execution. The software and orchestration subsystems allocate computing resources for the function execution by intelligently spinning up and down containers for function code with decreased instantiation latency and increased execution scalability while maintaining secured execution.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: March 5, 2024
    Assignee: Intel Corporation
    Inventors: Mohammad R. Haghighat, Kshitij Doshi, Andrew J. Herdrich, Anup Mohan, Ravishankar R. Iyer, Mingqiu Sun, Krishna Bhuyan, Teck Joo Goh, Mohan J. Kumar, Michael Prinke, Michael Lemay, Leeor Peled, Jr-Shian Tsai, David M. Durham, Jeffrey D. Chamberlain, Vadim A. Sukhomlinov, Eric J. Dahlen, Sara Baghsorkhi, Harshad Sane, Areg Melik-Adamyan, Ravi Sahita, Dmitry Yurievich Babokin, Ian M. Steiner, Alexander Bachmutsky, Anil Rao, Mingwei Zhang, Nilesh K. Jain, Amin Firoozshahian, Baiju V. Patel, Wenyong Huang, Yeluri Raghuram
  • Publication number: 20220309372
    Abstract: An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.
    Type: Application
    Filed: July 8, 2021
    Publication date: September 29, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Jiun-Yun LI, Shih-Yuan CHEN, Yao-Chun CHANG, Ian HUANG, Chiung-Yu CHEN
  • Publication number: 20110313806
    Abstract: This invention relates to an online booking system and method relating to same which can be used by any user, person, business, professional or facility. More particularly this invention relates to an on line calendar system and computer implemented method for online calendar appointments; embodiments of which can be used for example by, doctors, dentists, restaurants, barber shops, and the like. The person, business or professional sets up the calendar(s) online and users can book.
    Type: Application
    Filed: June 17, 2010
    Publication date: December 22, 2011
    Inventor: Ian Huang
  • Publication number: 20060282336
    Abstract: The present invention provides an internet search engine and associated website which provides users with ranked website search results. In an aspect of the present invention, the search engine and associated website provides a critical rating function. Critics can be human experts who review websites on the internet and rate and comment on them. Users apply to become critics, and their applications are reviewed for acceptability by other critics. Critics are selected in particular professions for their expertise in those areas. The critics provide a rating and comments in relation to a site, or to other online content, including text, audio and video, among other things. Ratings and comments are also available to users. In other words, the present invention provides for at least two levels of critical review: critics' review and users' review. In an aspect of the present invention, an advanced critic sorting mechanism is provided.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 14, 2006
    Inventor: Ian Huang
  • Patent number: 7061804
    Abstract: Techniques for quickly and reliably accessing a memory device (e.g., a NAND Flash memory) with adaptive interface timing are described. For memory access with adaptive interface timing, the NAND Flash memory is accessed at an initial memory access rate, which may be the rate predicted to achieve reliable memory access. Error correction coding (ECC), which is often employed for NAND Flash memory, is then used to ensure reliable access of the NAND Flash. For a read operation, one page of data is read at a time from the NAND Flash memory, and the ECC determines whether the page read from the NAND Flash memory contains any errors. If errors are encountered, then a slower memory access rate is selected, and the page with error is read again from the NAND Flash memory at the new rate. The techniques may be used to write data to the NAND Flash memory.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: June 13, 2006
    Assignee: QUALCOMM Incorporated
    Inventors: Dexter Tamio Chun, Ajit Patil, Ian Huang, Jason Chan, Timothy Gold
  • Publication number: 20060104115
    Abstract: Techniques for quickly and reliably accessing a memory device (e.g., a NAND Flash memory) with adaptive interface timing are described. For memory access with adaptive interface timing, the NAND Flash memory is accessed at an initial memory access rate, which may be the rate predicted to achieve reliable memory access. Error correction coding (ECC), which is often employed for NAND Flash memory, is then used to ensure reliable access of the NAND Flash. For a read operation, one page of data is read at a time from the NAND Flash memory, and the ECC determines whether the page read from the NAND Flash memory contains any errors. If errors are encountered, then a slower memory access rate is selected, and the page with error is read again from the NAND Flash memory at the new rate. The techniques may be used to write data to the NAND Flash memory.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Inventors: Dexter Chun, Ajit Patil, Ian Huang, Jason Chan, Timothy Gold