Patents by Inventor Ian M. C. Shand

Ian M. C. Shand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5557745
    Abstract: A method of transferring foreign protocol information across a hierarchical backbone network is disclosed. The hierarchical backbone network operates according to a first protocol and includes multiple areas, some of which have a destination that operates according to a second protocol. Additionally, each area has at least one router located therein. The locations of the destinations in each area are identified to the router in that area. Information that identifies the locations of the destinations in each area is transferred to a router in each of the other areas regardless of whether the destinations are located in the same area as the router. Finally, information formatted according to the second protocol is transferred among any of the destinations.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: September 17, 1996
    Assignee: Digital Equipment Corporation
    Inventors: Radia J. Perlman, Ian M. C. Shand, Christopher W. Gunner
  • Patent number: 5553085
    Abstract: A node operating in a network using the International Standard Organization (ISO) High-Level Data Link Control (HDLC) network protocol includes a mechanism for encoding information such that frames including the encoded information can be correctly interpreted by nodes operating in either of the standard 16-bit or 32-bit ISO-HDLC operating modes. The encoding mechanism produces a preliminary frame check sequence by encoding the information in an encoder using a generator polynomial G.sub.48 (x), which is a combination of the generator polynomials G.sub.16 (x) and G.sub.32 (x) which are used to produce frame check sequences for nodes operating in 16-bit or 32-bit modes, respectively. Before the information is encoded, the encoding mechanism sets the encoder to an initial condition using an initializing polynomial I.sub.48 (x). The preliminary frame check sequence is further encoded by adding to it a complementing polynomial C.sub.48 (x). The result is a 48-bit frame check sequence.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 3, 1996
    Assignee: Digital Equipment Corporation
    Inventors: Anthony G. Lauck, Ian M. C. Shand, John Harper
  • Patent number: 5491692
    Abstract: A communication network consists of end units (EUs) and distribution units (DUs) coupled together by links which may include local area networks (LANs). The units maintain neighbor tables by sending out Hello messages which indicate the unit type and contain the network service access point (NSAP) IDs or addresses of the units. Data messages (packets) mainly originate and end at EUs. An EU maintains only partial routing information about neighbors, while the DUs collectively maintain complete information about all NSAPs. So if an EU wants to send a packet to an EU which is not a neighbour (and sometimes even if it is), it need merely send it to a neighboring DU; that DU, along with the other DUs, must find a route to the destination EU. This invention provides a hybrid unit (HU), which acts as a DU to EUs but as an EU to DUs. The HU provides DU-like message forwarding but only on a local basis within a subnetwork of EUs and HUs.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: February 13, 1996
    Assignee: Digital Equipment International Limited
    Inventors: Christopher W. Gunner, John A. Harper, Ian M. C. Shand
  • Patent number: 5307355
    Abstract: A node operating in a network using the International Standard Organization (ISO) High-Level Data Link Control (HDLC) network protocol includes a mechanism for encoding information such that frames including the encoded information can be correctly interpreted by nodes operating in either of the standard 16-bit or 32-bit ISO-HDLC operating modes. The encoding mechanism produces a preliminary frame check sequence by encoding the information in an encoder using a generator polynomial G.sub.48 (x), which is a combination of the generator polynomials G.sub.16 (x) and G.sub.32 (x) which are used to produce frame check sequences for nodes operating in 16-bit or 32-bit modes, respectively. Before the information is encoded, the encoding mechanism sets the encoder to an initial condition using an initializing polynomial I.sub.48 (x). The preliminary frame check sequence is further encoded by adding to it a complementing polynomial C.sub.48 (x). The result is a 48-bit frame check sequence.
    Type: Grant
    Filed: January 30, 1991
    Date of Patent: April 26, 1994
    Assignee: Digital Equipment International Limited
    Inventors: Anthony G. Lauck, Ian M. C. Shand, John Harper