Patents by Inventor Ian M. Hughes

Ian M. Hughes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11316656
    Abstract: A time transfer modem includes a radio frequency integrated circuit (RFIC), a radio frequency (RF) front end, and processing circuitry. The RF front end is configured to receive and up-convert an input for time transfer with a remote station to generate an up-converted timing signal centered at a select frequency that is outside of a frequency range of interest but within an operational frequency range of the RFIC. The RF front end may also be configured to attenuate, via a pre-selection filter, up-converted adjacent signals to generate a filtered timing signal at the select frequency. The RFIC may be configured to down-convert and digitize the filtered timing signal to generate a digitized timing signal for signal processing by the processing circuitry to determine a clock difference between a local clock signal and the digitized timing signal that originated from the remote station.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: April 26, 2022
    Assignee: The Johns Hopkins University
    Inventors: Norman H. Adams, Jeffrey A. Boye, Adam V. Crifasi, Blair C. Fonville, Ian M. Hughes, Amit Shah, Gregory L. Weaver, John F. Youssef, Darrell A. Zinn
  • Publication number: 20220116197
    Abstract: A time transfer modem includes a radio frequency integrated circuit (RFIC), a radio frequency (RF) front end, and processing circuitry. The RF front end is configured to receive and up-convert an input for time transfer with a remote station to generate an up-converted timing signal centered at a select frequency that is outside of a frequency range of interest but within an operational frequency range of the RFIC. The RF front end may also be configured to attenuate, via a pre-selection filter, up-converted adjacent signals to generate a filtered timing signal at the select frequency. The RFIC may be configured to down-convert and digitize the filtered timing signal to generate a digitized timing signal for signal processing by the processing circuitry to determine a clock difference between a local clock signal and the digitized timing signal that originated from the remote station.
    Type: Application
    Filed: May 6, 2021
    Publication date: April 14, 2022
    Inventors: Norman H. Adams, Jeffrey A. Boye, Adam V. Crifasi, Blair C. Fonville, Ian M. Hughes, Amit Shah, Gregory L. Weaver, John F. Youssef, Darrell A. Zinn
  • Patent number: 6204781
    Abstract: A general rate N/(N+1) (0, G), code construction, e.g., for a magnetic recording system, allows for encoding or decoding of a dataword having N elements, N preferably being an integer multiple of eight. The dataword is divided into N/8 bytes of binary data that are encoded as a run-length limited (RLL) codeword in accordance with the general rate N/(N+1) (0, G) code construction. The general rate N/(N+1) (0, G) code construction is characterized by the constraints (d=0, G=(N/4)+1, l=N/8, r=N/8). the N/(N+1) (0 (N/4)+1, N/8, N/8) RLL codeword is constructed from the dataword in accordance with 1) pivot bits identifying code violations related to the constraints, 2) correction bits set to correct code violations, and 3) preserved elements having values not included in the code violations.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: March 20, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Pervez M. Aziz, Ian M. Hughes, Patrick W. Kempsey, Srinivasan Surendran