Abstract: An oil pan assembly including a first portion having an inner set of openings configured to receive a first set of fasteners to couple the first portion to an engine block and a second portion having an outer set of openings positioned laterally outward relative to the inner set of openings and configured to receive a second set of fasteners to couple the second portion to the first portion and the engine block.

Abstract: An oil pan assembly including a first portion having an inner set of openings configured to receive a first set of fasteners to couple the first portion to an engine block and a second portion having an outer set of openings positioned laterally outward relative to the inner set of openings and configured to receive a second set of fasteners to couple the second portion to the first portion and the engine block.

Abstract: There is provided an apparatus and a method for the receipt and processing of data signals carried in a plurality of predefined frequency bands and allowing a frequency band required at an instant of time to be selected from the predefined frequency bands from which data is to be retrieved. Passing the data signals from the wanted band to a transmitter and/or receiver including first and second mixing means to process the data signals, typically using in-phase and quadrative data feeds to create a predefined representation of the wanted frequency band, to provide an output for receipt by at least one broadcast data receiver and at least the transmitter and/or receiver is provided as part of an integrated circuit rather than as separate connected components.

Abstract: There is provided an apparatus and a method for the receipt and processing of data signals carried in a plurality of predefined frequency bands and allowing a frequency band required at an instant of time to be selected from the predefined frequency bands from which data is to be retrieved. Passing the data signals from the wanted band to a transmitter and/or receiver including first and second mixing means to process the data signals, typically using in-phase and quadrative data feeds to create a predefined representation of the wanted frequency band, to provide an output for receipt by at least one broadcast data receiver and at least the transmitter and/or receiver is provided as part of an integrated circuit rather than as separate connected components.

Abstract: A method of growing semiconductor materials in the Indium, Aluminium, Gallium Nitride (InAlGaN) material system and to devices made therefrom, in particular optical devices in the ultraviolet to green region of the visible spectrum. Certain optical devices, for example Vertical Cavity Surface Emitting Lasers (VCSELs) require great precision in the thickness of certain semiconductor layers. One aspect of the present invention provides a gallium-rich group III nitride layer (200, 201) and an adjacent layer of AlxInyGa1-x-yN layer (202). The AlxInyGa1-x-yN layer (202) acts as a fabrication facilitation layer and is selected to provide a good lattice match and high refractive index contrast with the gallium-rich group III nitride layer (200, 201). The high refractive index contrast permits in-situ optical monitoring. The extra layer (202) can be used as an etch marker or etch stop layer in subsequent processing and may be used in a lift-off process.

Abstract: Indeterminate length fiber tows ends are joined by overlapping end portions of the first and second fiber tows. The first and second tows are secured in a clamp with a portion of the overlapping area exposed. The overlapping area of the tows is positioned on a sewing unit having a support and sewing head, at least one of which is displaceable along first and second axes, and a controller for executing a preprogrammed stitching pattern. The controller is actuated to form the preprogrammed stitching pattern in the exposed portion of the overlapping area, thereby splicing the first and second fiber tows.

Abstract: An amplifier circuit includes a circuit input, and a circuit output. An inverter, including first and second MOS transistors is connected between first and second supply voltages, and has an inverter input connected to the circuit input, and an inverter output, which provides an inverter output current corresponding to a circuit input voltage. A first resistive element comprises a third MOS transistor and a fourth MOS transistor of opposite conductivity types, and each having their gate and drain terminals connected to the inverter output and the circuit output, and having their respective source terminals connected to respective ones of the first and second supply voltages. A second resistive element includes a fifth MOS transistor and a sixth MOS transistor of opposite conductivity types, and each having its drain-source path connected between the circuit output and the circuit input, and having its gate connected to a respective voltage source.

Abstract: An amplifier circuit comprises a circuit input 14, and a circuit output 22. An inverter, comprising first and second MOS transistors 16,18 is connected between first and second supply voltages Vdd, Vss, and has an inverter input connected to the circuit input 14, and an inverter output 20, which provides an inverter output current corresponding to a circuit input voltage. A first resistive element comprises a third MOS transistor 24 and a fourth MOS transistor 26, the third and fourth transistors being of opposite conductivity types, and each having their gate and drain terminals connected to the inverter output 20 and the circuit output 22, and having their respective source terminals connected to respective ones of the first and second supply voltages Vdd, Vss.

Abstract: A data processing system comprises a number of processing nodes, each having a processor and a local store. The workload of the system is represented by packets, including function packets specifying a function and pointers to one or more argument packets to which the function is to be applied. When a node processes a function packet, it checks whether all its argument packets are resident in the local store. If not, copies of the argument packets are fetched from the remote nodes in which they reside. These argument packets are referenced by special indirection packets, which contain the local and global address of the argument packet, and a reference count for garbage collection purposes.

Abstract: A data processing system is described in which the workload is divided into packets. A plurality of processors access the packets and process them by rewriting them according to predetermined rules. Packets can be of a number of different types, including XAPP and PAPP. An XAPP packet contains a function and one or more arguments in evaluated form, so that the function can be immediately applied to the arguements. A PAPP packet is similar except that its arguments may not be in evaluated form. Processing of an active PAPP packet consists of activating other packets which evaluate the arguments of the PAPP packet, and converting the PAPP to a suspended XAPP packet, awaiting return information from those other packets. The use of different packet types allows greater efficiency, by eliminating redundant actions in processing of the packets.