Patents by Inventor Ian-Wei Chian

Ian-Wei Chian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110234365
    Abstract: The present invention relates to a chip resistor having low resistance and a method for manufacturing the same. The chip resistor includes a substrate, a resistive layer, a pair of conducting layers and at least one protective layer. The substrate has a first surface. The resistive layer is disposed on the first surface of the substrate. The conducting layers are disposed adjacent to the first surface of the substrate. The at least one protective layer is disposed on the resistive layer or the conducting layers. As a result, the resistive layer has a precise pattern, and the duration of sputtering is reduced, thereby improving yield rate and efficiency while reducing manufacturing cost.
    Type: Application
    Filed: February 11, 2011
    Publication date: September 29, 2011
    Applicant: YAGEO CORPORATION
    Inventors: CHIH-CHUNG YANG, MEI-LING LIN, IAN-WEI CHIAN, YA-TANG HU, CHIN-YUAN TSENG
  • Publication number: 20110089025
    Abstract: The present invention relates to a method for manufacturing a chip resistor having a low resistance. The method includes the following steps: (a) providing a substrate having a top surface; (b) sputtering a conducting layer directly on the top surface of the substrate, so that the conducting layer and the substrate contact each other, wherein the material of the conducting layer comprises nickel or copper; and (c) plating at least one metal layer directly on the conducting layer, so that the metal layer and the conducting layer contact each other, wherein the material of the metal layer comprises nickel or copper, and the conducting layer and the metal layer provide a resistive layer. As a result, the resistive layer has a precise pattern, and the duration of sputtering is reduced, so the yield rate and the efficiency are improved and the manufacturing cost is cut down.
    Type: Application
    Filed: October 20, 2009
    Publication date: April 21, 2011
    Applicant: YAGEO CORPORATION
    Inventors: Chih-Chung Yang, Mei-Ling Lin, Ian-Wei Chian, Wen-Cheng Wu, Wen-Hsiang Kong, Tsai-Hu Chen