Abstract: A carrier aggregation method can include amplifying a first signal with a first current converter to generate a current representative of the amplified first signal, and amplifying a second signal with a second current converter to generate a current representative of the amplified second signal. The method can further include processing the amplified first signal and the amplified second signal with an adder circuit, with the first current converter and the adder circuit forming a first cascode amplifier, and the second current converter and the adder circuit forming a second cascode amplifier. The method can further include providing an output signal at a common output node that is coupled to an output of each of the first and second cascode amplifiers.

Abstract: A carrier aggregation method can include amplifying a first signal with a first current converter to generate a current representative of the amplified first signal, and amplifying a second signal with a second current converter to generate a current representative of the amplified second signal. The method can further include processing the amplified first signal and the amplified second signal with an adder circuit, with the first current converter and the adder circuit forming a first cascode amplifier, and the second current converter and the adder circuit forming a second cascode amplifier. The method can further include providing an output signal at a common output node that is coupled to an output of each of the first and second cascode amplifiers.

Abstract: Switchless carrier aggregation. In some embodiments, a carrier aggregation circuit can include a first filter configured to allow operation in a first frequency band, and a second filter configured to allow operation in a second frequency band. The circuit can further include a first signal path implemented between the first filter and an output node, with the first signal path including a plurality of amplification stages configured to amplify a first signal. The first signal path can be substantially free of switches. The circuit can further include a second signal path implemented between the second filter and the output node, with the second signal path including a plurality of amplification stages configured to amplify a second signal. The second signal path can be substantially free of switches.

Abstract: Switchless carrier aggregation. In some embodiments, a carrier aggregation circuit can include a first filter configured to allow operation in a first frequency band, and a second filter configured to allow operation in a second frequency band. The circuit can further include a first signal path implemented between the first filter and an output node, with the first signal path including a plurality of amplification stages configured to amplify a first signal. The first signal path can be substantially free of switches. The circuit can further include a second signal path implemented between the second filter and the output node, with the second signal path including a plurality of amplification stages configured to amplify a second signal. The second signal path can be substantially free of switches.

Abstract: Circuits and methods related to switchless carrier aggregation in radio-frequency receivers. In some embodiments, a carrier aggregation (CA) circuit can include a first filter configured to allow operation in a first frequency band, and a second filter configured to allow operation in a second frequency band. The CA circuit can further include a first signal path implemented between the first filter and an output node, with the first signal path including a plurality of amplification stages configured to amplify a first radio-frequency (RF) signal. The first signal path can be substantially free of switches. The CA circuit can further include a second signal path implemented between the second filter and the output node, with the second signal path including a plurality of amplification stages configured to amplify a second RF signal. The second signal path can be substantially free of switches.

Abstract: Low-noise amplifier having inter-stage filter. In some embodiments, an amplifier assembly for amplifying a signal can include an input amplification stage and an output amplification stage. The amplifier assembly can further include an inter-stage filter implemented between the input amplification stage and the output amplification stage.

Abstract: Apparatus and methods for biasing low noise amplifiers are provided herein. In certain configurations, a low noise amplifier (LNA) includes an input, an output, a transconductance device, a cascode device, a bias current source, and a feedback bias circuit. The transconductance device generates an amplified signal by amplifying an input signal received at the input, and provides the amplified signal to the output via the cascode device. The bias current source generates a bias current that flows through the cascode device and the transconductance device. The feedback bias circuit provides feedback from the LNA's output to the LNA's input to control an input bias voltage of the transconductance device.

Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes an input, an output, a transconductance device, a cascode device, and a mid-node impedance network. The transconductance device generates an amplified signal by amplifying an input signal received at the input, and provides the amplified signal to the output via the cascode device. The mid-node impedance network is electrically connected between the transconductance device and the cascode device, and provides compensation for a parasitic capacitance of the gm device, thereby enhancing the LNA's performance.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: Circuits and methods related to switchless carrier aggregation in radio-frequency receivers. In some embodiments, a carrier aggregation (CA) circuit can include a first filter configured to allow operation in a first frequency band, and a second filter configured to allow operation in a second frequency band. The CA circuit can further include a first signal path implemented between the first filter and an output node, with the first signal path including a plurality of amplification stages configured to amplify a first radio-frequency (RF) signal. The first signal path can be substantially free of switches. The CA circuit can further include a second signal path implemented between the second filter and the output node, with the second signal path including a plurality of amplification stages configured to amplify a second RF signal. The second signal path can be substantially free of switches.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.