Abstract: A method for in situ threshold voltage determination of a semiconductor device includes sourcing a current to a first terminal of the semiconductor device. A gate terminal of the semiconductor device is driven with a plurality of gate levels. Each gate level includes one of a plurality of different gate voltages. A transistor voltage is measured between the first terminal and a second terminal of the semiconductor device during each gate level. The respective gate voltage is stored in response to the semiconductor device voltage transitioning past a voltage limit. A temperature dependent threshold voltage of the semiconductor device is estimated for a first measured temperature measured during the storing of the stored gate voltage from a previously stored gate voltage and a second measure temperature.

Abstract: A controller for a power converter device, wherein the controller is configured to provide for switching of a switching component of the power converter device based on a feature in a control signal, sample at least one parameter of the power converter device upon expiry of a predetermined time period after switching of the switching component; and output the sample of the at least one parameter.

Abstract: A method for in situ threshold voltage determination of a semiconductor device includes sourcing a current to a first terminal of the semiconductor device. A gate terminal of the semiconductor device is driven with a plurality of gate levels. Each gate level includes one of a plurality of different gate voltages. A transistor voltage is measured between the first terminal and a second terminal of the semiconductor device during each gate level. The respective gate voltage is stored in response to the semiconductor device voltage transitioning past a voltage limit. A temperature dependent threshold voltage of the semiconductor device is estimated for a first measured temperature measured during the storing of the stored gate voltage from a previously stored gate voltage and a second measure temperature.

Abstract: A method of discharging a link capacitor coupled between link nodes of a multiple phase inverter in which each phase comprises a pair of switches coupled in series between the link nodes, including turning off a first switch of a first phase, turning on a second switch of the first phase, and while the second switch of the first phase remains turned on, activating the first switch of the first phase with pulses and monitoring a link voltage across the link nodes until the link capacitor is discharged. Pulse width and duty cycle may be adjusted, or may remain fixed while pulse magnitude is adjusted until a desired discharge rate is reached. The temperature of pulsed phase switches may be monitored in which discharge operation is suspended while temperature is above a threshold. The switches of multiple phases may be pulsed to distribute discharge among multiple phases.

Abstract: A transistor circuit includes a transistor having a control electrode, a first current electrode, and a second current electrode. A turn off mode change circuit has a signal input that receives a series of pulses, an output coupled to the control electrode of the transistor, and a control input. The turn off mode change circuit has a fast turn off mode and a slow turn off mode. A turn off mode detection circuit is coupled between the first current electrode and the second current electrode. The turn off mode change circuit detects when a transition from the fast turn off mode to the slow turn off mode is desired and when a transition from the slow turn off mode to the fast transition mode may be performed.

Abstract: A transistor circuit includes a transistor having a control electrode, a first current electrode, and a second current electrode. A turn off mode change circuit has a signal input that receives a series of pulses, an output coupled to the control electrode of the transistor, and a control input. The turn off mode change circuit has a fast turn off mode and a slow turn off mode. A turn off mode detection circuit is coupled between the first current electrode and the second current electrode. The turn off mode change circuit detects when a transition from the fast turn off mode to the slow turn off mode is desired and when a transition from the slow turn off mode to the fast transition mode may be performed.

Abstract: An embodiment of an electronic device includes a logic circuit, a switching element, and a quiescent current (IDDQ) evaluation circuit. The logic circuit is coupled to a first ground node. The switching element is coupled between the first ground node and a second ground node. The switching element is configurable in an electrically non-conductive state when the electronic device is in an IDDQ evaluation state, and in an electrically conductive state when the electronic device is not in the IDDQ evaluation state. When the electronic device is in the IDDQ evaluation state, the IDDQ evaluation circuit is configured to provide a first output signal when an IDDQ indicating voltage across the first and second ground nodes exceeds a reference voltage. Other embodiments include methods for producing an indication of IDDQ in an electronic device and methods for fabricating an electronic device with the capability of producing an IDDQ indication.

Abstract: An embodiment of an electronic device includes a logic circuit, a switching element, and a quiescent current (IDDQ) evaluation circuit. The logic circuit is coupled to a first ground node. The switching element is coupled between the first ground node and a second ground node. The switching element is configurable in an electrically non-conductive state when the electronic device is in an IDDQ evaluation state, and in an electrically conductive state when the electronic device is not in the IDDQ evaluation state. When the electronic device is in the IDDQ evaluation state, the IDDQ evaluation circuit is configured to provide a first output signal when an IDDQ indicating voltage across the first and second ground nodes exceeds a reference voltage. Other embodiments include methods for producing an indication of IDDQ in an electronic device and methods for fabricating an electronic device with the capability of producing an IDDQ indication.