Patents by Inventor Ichiro Kouno

Ichiro Kouno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10974318
    Abstract: A CAE analysis die model is produced such that a cavity of a die for obtaining a cast product is divided into multiple elements. Fluidity analysis and solidification analysis are performed under a predetermined casting condition by means of the die model to calculate, for each element, a factor regarding growth of a solidification structure, a factor regarding purity of molten metal, and a factor regarding a hole defect. Mechanical characteristics of each portion of the cast product are obtained by a regression expression obtained by multiple regression analysis using mechanical characteristics of the cast product as an objective variable and using each factor as an explanatory variable.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: April 13, 2021
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Koji Takemura, Ichiro Kouno, Shohei Fujii, Shohei Hanaoka
  • Publication number: 20190184456
    Abstract: A CAE analysis die model is produced such that a cavity of a die for obtaining a cast product is divided into multiple elements. Fluidity analysis and solidification analysis are performed under a predetermined casting condition by means of the die model to calculate, for each element, a factor regarding growth of a solidification structure, a factor regarding purity of molten metal, and a factor regarding a hole defect. Mechanical characteristics of each portion of the cast product are obtained by a regression expression obtained by multiple regression analysis using mechanical characteristics of the cast product as an objective variable and using each factor as an explanatory variable.
    Type: Application
    Filed: November 20, 2018
    Publication date: June 20, 2019
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Koji TAKEMURA, Ichiro KOUNO, Shohei FUJII, Shohei HANAOKA
  • Patent number: 8749065
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of wiring lines which are provided on one side of the semiconductor substrate and which have connection pad portions, and a plurality of columnar electrodes respectively provided on the connection pad portions of the wiring lines, each of the columnar electrodes including an outer peripheral surface and a top surface. An electromigration prevention film is provided on at least the surfaces of the wiring lines. A sealing film is provided around the outer periphery surfaces of the columnar electrodes.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: June 10, 2014
    Assignee: Tera Probe, Inc.
    Inventors: Ichiro Kouno, Takeshi Wakabayashi, Ichiro Mihara
  • Publication number: 20080191357
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of wiring lines which are provided on one side of the semiconductor substrate and which have connection pad portions, and a plurality of columnar electrodes respectively provided on the connection pad portions of the wiring lines, each of the columnar electrodes including an outer peripheral surface and a top surface. An electromigration prevention film is provided on at least the surfaces of the wiring lines. A sealing film is provided around the outer periphery surfaces of the columnar electrodes.
    Type: Application
    Filed: January 22, 2008
    Publication date: August 14, 2008
    Applicant: Casio Computer Co., Ltd.
    Inventors: Ichiro Kouno, Takeshi Wakabayashi, Ichiro Mihara
  • Publication number: 20070085224
    Abstract: A semiconductor device has a semiconductor substrate having a plurality of connection pads on an upper surface thereof, a protective film made of a resin which is provided on the semiconductor substrate, and has openings at those portions to which the respective connection pads correspond, an altered layer having a mesh-like structure formed on an upper surface of the protective film, and a metallic layer provided on upper surfaces of the connection pads and an upper surfaces of the altered layer.
    Type: Application
    Filed: September 20, 2006
    Publication date: April 19, 2007
    Applicant: Casio Computer Co., Ltd.
    Inventors: Ichiro Kouno, Osamu Okada
  • Publication number: 20050188003
    Abstract: An expansion unit (peripheral device) includes a detection circuit for detecting establishment of communication between a PC card of a notebook-type personal computer and a communication board of the expansion unit, and a power supply control circuit for powering on the expansion unit in accordance with the detection of the establishment of communication by the detection circuit. The notebook-type personal computer starts up the OS as a result of being powered ON, performs recognition of the PC card in a card slot, supplies power to the PC card and, after a fixed wait time, performs recognition of a PCI board of the expansion unit via the PC card, the serial cable (communication line) and the communication board.
    Type: Application
    Filed: January 4, 2005
    Publication date: August 25, 2005
    Inventors: Mitsuo Teramura, Ichiro Kouno, Mitsuyoshi Uno
  • Patent number: 6770971
    Abstract: A semiconductor device includes a semiconductor structure including a semiconductor substrate having an integrated circuit portion, and a plurality of connecting pads connected to the integrated circuit portion. A plurality of distributing lines are formed on the semiconductor structure, connected to the connecting pads, and have connecting pad portions. An encapsulating layer made of a resin is formed on the semiconductor structure and upper surface of the distributing lines. A copper oxide layer is formed on at least a surface of each of the distributing lines except for the connecting pad portion.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: August 3, 2004
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ichiro Kouno, Osamu Okada
  • Publication number: 20030230804
    Abstract: A semiconductor device includes a semiconductor structure including a semiconductor substrate having an integrated circuit portion, and a plurality of connecting pads connected to the integrated circuit portion. A plurality of distributing lines are formed on the semiconductor structure, connected to the connecting pads, and have connecting pad portions. An encapsulating layer made of a resin is formed on the semiconductor structure and upper surface of the distributing lines. A copper oxide layer is formed on at least a surface of each of the distributing lines except for the connecting pad portion.
    Type: Application
    Filed: June 10, 2003
    Publication date: December 18, 2003
    Applicant: Casio Computer Co., Ltd.
    Inventors: Ichiro Kouno, Osamu Okada