Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.

Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.

Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.

Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.

Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.

Abstract: The characteristics of a semiconductor device using a nitride semiconductor are improved. A trench which penetrates an insulating film and a barrier layer and reaches inside of a channel layer is formed by etching the channel layer, the barrier layer, and the insulating film which are formed over a substrate. Then, an epitaxial regrowth layer is formed over a bottom surface and a side surface of the trench by using an epitaxial growth method. It is possible to reduce roughness (unevenness) of a crystal surface due to etching and the like of the bottom surface and the side surface of the trench by forming the epitaxial regrowth layer in this way. A channel is formed in an interface between the epitaxial regrowth layer and a gate insulating film, so that mobility of carriers improves and on-resistance of an element decreases.

Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has an impurity-containing potential fixed layer, and a gate electrode. A drain electrode and a source electrode are formed on the opposite sides of the gate electrode. An interlayer insulation film is formed between the gate electrode and the drain electrode, and between the gate electrode and the source electrode. The concentration of the inactivating element in the portion of the potential fixed layer under the drain electrode is higher than the concentration of the inactivating element in the portion of the potential fixed layer under the source electrode. The film thickness of the portion of the interlayer insulation film between the gate electrode and the drain electrode is different from the film thickness of the portion of the interlayer insulation film between the gate electrode and the source electrode.

Abstract: The characteristics of a semiconductor device using a nitride semiconductor are improved. A trench which penetrates an insulating film and a barrier layer and reaches inside of a channel layer is formed by etching the channel layer, the barrier layer, and the insulating film which are formed over a substrate. Then, an epitaxial regrowth layer is formed over a bottom surface and a side surface of the trench by using an epitaxial growth method. It is possible to reduce roughness (unevenness) of a crystal surface due to etching and the like of the bottom surface and the side surface of the trench by forming the epitaxial regrowth layer in this way. A channel is formed in an interface between the epitaxial regrowth layer and a gate insulating film, so that mobility of carriers improves and on-resistance of an element decreases.

Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.

Abstract: A first cladding layer is formed above a substrate. An active layer is formed above the first cladding layer. An optical confinement layer is formed above the active layer. A pair of band-like current block layers is formed above the optical confinement layer and opposed to each other through an opening extending in a first direction. A second cladding layer is formed on the current block layers and the optical confinement layer. A contact layer is formed above the second cladding layer. A mesa portion is formed by being sandwiched between a pair of groove portions. The current block layers and the opening are included in the mesa portion, and an end of each current block layer on an opposite side to the opening and a side wall of the mesa portion are spaced apart by a predetermined value or more in a second direction.

Abstract: A first cladding layer is formed above a substrate. An active layer is formed above the first cladding layer. An optical confinement layer is formed above the active layer. A pair of band-like current block layers is formed above the optical confinement layer and opposed to each other through an opening extending in a first direction. A second cladding layer is formed on the current block layers and the optical confinement layer. A contact layer is formed above the second cladding layer. A mesa portion is formed by being sandwiched between a pair of groove portions. The current block layers and the opening are included in the mesa portion, and an end of each current block layer on an opposite side to the opening and a side wall of the mesa portion are spaced apart by a predetermined value or more in a second direction.

Abstract: A laser diode 300 includes a p-type GaN guide layer 107, a current confinement layer 314 provided on the p-type GaN guide layer 107 and having an opening 314A formed therein, and a p-type cladding layer 108 provided on the current confinement layer 314 and plugging the opening 314A formed in the current confinement layer 314. An interface between the p-type cladding layer 108 and the p-type GaN guide layer 107 is located in a bottom of the opening 314A. The current confinement layer 314 is a layer of a group III nitride semiconductor, and a width dimension of the opening 314A is minimized in the upper side of the opening 314A.