Patents by Inventor Ichiro Mitamura

Ichiro Mitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5029127
    Abstract: There is implemented memory cells and corresponding signal lines associated therewith in bipolar type static random access memories employing wirings of multi-layer construction for transmitting a common signal therethrough such as with respect to the individual word lines. The word lines implemented are formed from at least a pair of stacked conductive layers and which layers have interposed therebetween an insulating film. The pair of layers form a pair of wiring lines wherein together they form a work line and wherein the wiring lines are, furthermore, interconnected at predetermined intervals along the lengths thereof. This leads to the ability to decrease the chip size of semiconductor integrated circuits noting that a decrease in the voltage drop of a signal line results, and to prevent electromigration in the signal (wiring) lines.
    Type: Grant
    Filed: May 15, 1990
    Date of Patent: July 2, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Akihisa Uchida, Ichiro Mitamura, Keiichi Higeta
  • Patent number: 4926378
    Abstract: There is implemented memory cells and corresponding signal lines associated therewith in bipolar type static random access memories employing wirings of multi-layer construction for transmitting a common signal therethrough such as with respect to the individual word lines. The word lines implemented are formed from at least a pair of stacked conductive layers of a material whose principal component is aluminum and which layers have interposed therebetween an insulating film. The pair of layers form a pair of wiring lines corresponding together to a word line and wherein the wiring lines are, furthermore, interconnected at predetermined intervals along the lengths thereof. This leads to the ability to decrease the chip size of semiconductor integrated circuits noting that a decrease in the voltage drop of a signal line results, and to prevent electromigration in the signal (wiring) lines.
    Type: Grant
    Filed: February 25, 1988
    Date of Patent: May 15, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Akihisa Uchida, Ichiro Mitamura, Keiichi Higeta
  • Patent number: 4809052
    Abstract: A semiconductor memory device is provided such as the type having flip-flop memory cells each including two bipolar transistors in cross connection with each other. In certain embodiments, at least a part of a Schottky barrier diode or capacitor in the memory cell is formed under a digit line. This memory device is greatly reduced in its required area, and the Schottky barrier diode and capacitor are negligibly influenced by the digit line. In other embodiments, it is arranged to provide different electrodes for the Schottky barrier diode and the capacitor to optimize construction in a minimized space.
    Type: Grant
    Filed: May 7, 1986
    Date of Patent: February 28, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Yasushiro Nishioka, Takeo Shiba, Hiroshi Shinriki, Kiichiro Mukai, Akihisa Uchida, Ichiro Mitamura, Keiichi Higeta, Katsumi Ogiue, Kunihiko Yamaguchi, Noriyuki Sakuma
  • Patent number: 4305022
    Abstract: A horizontal scanning rate correction apparatus for a cathode-ray tube, particularly of the beam index color cathode-ray tube type, includes a memory for storing correction values representing deviations of the horizontal scanning rate of the electron beam from a desired scanning rate at each of a plurality of horizontal sampling positions along each of a plurality of predetermined horizontal sampling lines which are substantially fewer in number than the horizontal lines along which scanning occurs. During display of a video signal, a selected one of the stored correction values is read out of the memory for each scanning position of the beam along a scanned one of the horizontal lines, with each read correction value, and a corresponding sampling line correction signal produced therefrom, representing the deviation at a corresponding horizontal sampling position on one of the sampling lines.
    Type: Grant
    Filed: December 6, 1979
    Date of Patent: December 8, 1981
    Assignee: Sony Corporation
    Inventors: Ichiro Mitamura, Katsuo Isono
  • Patent number: 4287531
    Abstract: Deflection control apparatus is disclosed for a beam index color television receiver of the type which includes a cathode ray tube adapted to display a video picture in response to a received color television signal. The beam index cathode ray tube is provided with index stripes which are scanned by the electron beam as the beam scans a raster across the display screen of the tube. A detector detects when the respective index stripes are scanned by the beam so as to produce an index signal, the frequency of which varies from a predetermined frequency value when the scanning speed of the beam varies. An oscillator generates an oscillating signal that is synchronized with the index signal, and a phase locked loop, which includes a comparator for comparing the index signal to the oscillating signal so as to produce a control signal as a function of the difference therebetween, adjusts the frequency of the oscillating signal in accordance with that control signal.
    Type: Grant
    Filed: November 19, 1979
    Date of Patent: September 1, 1981
    Assignee: Sony Corporation
    Inventors: Ichiro Mitamura, Akira Tooyama, Takashi Hosono
  • Patent number: 4281340
    Abstract: Horizontal scanning rate correction apparatus is provided for beam index color cathode-ray tubes of the type having a screen, an electron gun for projecting an electron beam upon the screen, a plurality of index elements positioned to be struck by the electron beam as it scans across the screen, a deflection device for causing the electron beam to repeatedly scan across the screen in a vertical succession of horizontal lines, and an index signal processing circuit for producing an index signal having a frequency determined by the frequency of the incidence of the electron beam upon the index elements as it scans horizontal lines and for controlling color switching circuitry which determines which of a plurality of color signals modulates the intensity of the electron beam.
    Type: Grant
    Filed: December 3, 1979
    Date of Patent: July 28, 1981
    Assignee: Sony Corporation
    Inventors: Ichiro Mitamura, Katsuo Isono, Takashi Hosono
  • Patent number: 4215296
    Abstract: A television horizontal deflection circuit is provided with a flyback transformer and a switching regulator transformer which are substantially magnetically independent of each other and which are connected with their primaries in series with a switching device and a source of input voltage. The secondary winding of the switching regulator transformer supplies power to a regulated D.C. voltage supply, which in turn supplies power to a resonant circuit. The resonant circuit is connected to a reference potential through the switching device and includes a damper diode, a resonant capacitor, a deflection coil and a series connected capacitor. A secondary winding of the flyback transformer is used to derive a high voltage for use in the high voltage anode of a television picture tube. In a preferred embodiment, the flyback transformer contains an additional winding which is connected between the regulated D.C. voltage supply and the resonant circuit.
    Type: Grant
    Filed: November 29, 1978
    Date of Patent: July 29, 1980
    Assignee: Sony Corporation
    Inventors: Ichiro Mitamura, Masayuki Yasumura