Patents by Inventor Ichiro Toyama

Ichiro Toyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8547676
    Abstract: Provided are an overcurrent protection device and an overcurrent protection system which can provide time differences among the timings for executing the retry operations among a plurality of overcurrent protection devices connected to a common power supply. When a battery voltage (VBA) becomes a value equal to or lower than a threshold voltage after an FET (Q1) of an IC circuit (51-1) is turned on, all FETs (Q1) of the respective IC circuits are turned off, and a time until the battery voltage (VBA) reduces to a value lower than a threshold voltage after the turning-on of the FET (Q1) is clocked. When the time is smaller than 400 ?sec, the count value N is incremented. Further, turning-on of the FETs (Q1) is repeated after the lapse of the standby time (Tp) set randomly. When the count value N reaches 7, the FET (Q1) of the IC circuit 51-1 is held in the turned-off state.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: October 1, 2013
    Assignee: Yazaki Corporation
    Inventors: Kazumi Nagasawa, Kaoru Kurita, Masashi Nakayama, Ichiro Toyama, Mitsuaki Maeda, Shigemi Ishima
  • Publication number: 20120170166
    Abstract: Provided are an overcurrent protection device and an overcurrent protection system which can provide time differences among the timings for executing the retry operations among a plurality of overcurrent protection devices connected to a common power supply. When a battery voltage (VBA) becomes a value equal to or lower than a threshold voltage after an FET (Q1) of an IC circuit (51-1) is turned on, all FETs (Q1) of the respective IC circuits are turned off, and a time until the battery voltage (VBA) reduces to a value lower than a threshold voltage after the turning-on of the FET (Q1) is clocked. When the time is smaller than 400 ?sec, the count value N is incremented. Further, turning-on of the FETs (Q1) is repeated after the lapse of the standby time (Tp) set randomly. When the count value N reaches 7, the FET (Q1) of the IC circuit 51-1 is held in the turned-off state.
    Type: Application
    Filed: February 4, 2011
    Publication date: July 5, 2012
    Applicant: YAZAKI CORPORATION
    Inventors: Kazumi Nagasawa, Kaoru Kurita, Masashi Nakayama, Ichiro Toyama, Mitsuaki Maeda, Shigemi Ishima