Patents by Inventor Ichiron Yoshimura

Ichiron Yoshimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Single side polishing using shape matching
    Patent number: 9193025
    Abstract: A method of polishing a wafer is disclosed that includes determining a removal profile. The wafer is measured to determine a starting wafer profile and then the wafer is polished. The wafer is again measured after being polished to determine a polished wafer profile. The starting wafer profile and the polished wafer profile are compared to each other to determine the removal profile by computing the amount and shape of material removed from the first wafer during polishing.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: November 24, 2015
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Sumeet S. Bhagavat, Khiam How Low, Ichiron Yoshimura, John Allen Pitney
  • SINGLE SIDE POLISHING USING SHAPE MATCHING
    Publication number: 20140273748
    Abstract: A method of polishing a wafer is disclosed that includes determining a removal profile. The wafer is measured to determine a starting wafer profile and then the wafer is polished. The wafer is again measured after being polished to determine a polished wafer profile. The starting wafer profile and the polished wafer profile are compared to each other to determine the removal profile by computing the amount and shape of material removed from the first wafer during polishing.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Sumeet S. Bhagavat, Khiam How Low, Ichiron Yoshimura, John Allen Pitney