Abstract: A semiconductor device includes a substrate, and the substrate is, on its surface, formed with wiring patterns onto which a resist is formed. Because an outer peripheral edge line of the resist passes over througholes, the outer peripheral edge line of the resist never comes close to the wiring patterns and be in parallel thereto. Specifically, since the plurality of througholes are arranged in a matrix fashion on the substrate, a direction to which each of the wiring patterns extends from each of the througholes is sure to form a predetermined angle with respect to a direction that the througholes are aligned. Accordingly, even if an outer periphery edge portion of the resist which passes over the througholes flows into an outside thereof, a thin film of the resist is not formed in a long thin shape, and a plating film is not formed in a long thin shape on the thin film.

Abstract: A semiconductor device includes a substrate, and the substrate is formed with a wiring pattern on its surface. The wiring pattern includes electrodes, wire-bonding (WB) pads and connecting portions for connecting the electrodes and the WB pads. The WB pads are so formed that the lengthwise directions thereof are in parallel or approximately in parallel to lines, in radiative form, extending from the center of a die-bonding (DB) area. Accordingly, if a chip having a first size is die-bonded within the DB area, bonding wires become approximately in parallel to the lengthwise directions of the WB pads. Even if a chip having a second size smaller than the first size but the same shape is die-bonded, the bonding wires are also in parallel to the lengthwise directions of the WB pads. Thus, since one substrate can be used regardless of the size of a chip, there is no need to prepare a plurality of wiring patterns for each size of chips.

Abstract: A semiconductor device includes a substrate, and the substrate is, on its surface, formed with wiring patterns onto which a resist is formed. Because an outer peripheral edge line of the resist passes over througholes, the outer peripheral edge line of the resist never comes close to the wiring patterns and be in parallel thereto. Specifically, since the plurality of througholes are arranged in a matrix fashion on the substrate, a direction to which each of the wiring patterns extends from each of the througholes is sure to form a predetermined angle with respect to a direction that the througholes are aligned. Accordingly, even if an outer periphery edge portion of the resist which passes over the throuholes flows into an outside thereof, a thin film of the resist is not formed in a long thin shape, and a plating film is not formed in a long thin shape on the thin film.

Abstract: A semiconductor device includes a substrate, and the substrate is formed with a wiring pattern on its surface. The wiring pattern includes electrodes, wire-bonding (WB) pads and connecting portions for connecting the electrodes and the WB pads. The WB pads are so formed that the lengthwise directions thereof are in parallel or approximately in parallel to lines, in radiative form, extending from the center of a die-bonding (DB) area. Accordingly, if a chip having a first size is die-bonded within the DB area, bonding wires become approximately in parallel to the lengthwise directions of the WB pads. Even if a chip having a second size smaller than the first size but the same shape is die-bonded, the bonding wires are also in parallel to the lengthwise directions of the WB pads. Thus, since one substrate can be used regardless of the size of a chip, there is no need to prepare a plurality of wiring patterns for each size of chips.