Patents by Inventor Ido Gazit

Ido Gazit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11026202
    Abstract: A system and method of synchronizing a mesh network comprising a plurality of nodes are provided. The method may include sensing and transmitting, by a first subset of the plurality nodes, temperature values of the first subset nodes; receiving, by at least one back-end unit, from the first subset nodes, the temperature values of the first subset nodes; determining, by the at least one back-end unit, for a second subset of the plurality of nodes including all the first subset nodes, respective ambient-related clock drift values, based on the temperature values of the first subset nodes and an inter-node data; transmitting, by the at least one back-end unit, the respective ambient-related clock drift values to the second subset nodes; and determining, by the second subset nodes, ambient-related time offset values between each respective two nodes of the second subset, based on the respective nodes' ambient-related clock drift values.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: June 1, 2021
    Assignee: CONNECTED INTELLIGENCE SYSTEMS LTD.
    Inventor: Ido Gazit
  • Publication number: 20200413361
    Abstract: A system and method of synchronizing a mesh network comprising a plurality of nodes are provided. The method may include sensing and transmitting, by a first subset of the plurality nodes, temperature values of the first subset nodes; receiving, by at least one back-end unit, from the first subset nodes, the temperature values of the first subset nodes; determining, by the at least one back-end unit, for a second subset of the plurality of nodes including all the first subset nodes, respective ambient-related clock drift values, based on the temperature values of the first subset nodes and an inter-node data; transmitting, by the at least one back-end unit, the respective ambient-related clock drift values to the second subset nodes; and determining, by the second subset nodes, ambient-related time offset values between each respective two nodes of the second subset, based on the respective nodes' ambient-related clock drift values.
    Type: Application
    Filed: March 7, 2019
    Publication date: December 31, 2020
    Applicant: Connected Intelligence Systems LTD.
    Inventor: Ido GAZIT
  • Patent number: 9680614
    Abstract: In described embodiments, a physical downlink control channel of a device operating in accordance with a 3GPP LTE standard is processed to provide interleaving, modulation and multi-layer mapping and pre-coding. A Resource Element Group interleaver applies interleaving to an input signal representing an input bitstream, and a modulator modulates the input signal. After interleaving and modulating the signal, a multi-layer mapper and pre-coder layer-maps and pre-codes the interleaved and modulated input signal into a plurality of different layers.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: June 13, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Ido Gazit, Eran Goldstein, Shai Kalfon
  • Patent number: 9042300
    Abstract: A transmitter comprises indicator channel processing circuitry configured to process indicator channel codewords for transmission in a base station of a wireless system. The indicator channel processing circuitry performs a plurality of processing operations on the indicator channel codewords in a specified processing sequence, with the plurality of processing operations comprising at least modulation, scrambling, spreading and combining. In the specified processing sequence, the scrambling operation is performed for at least a given one of the indicator channel codewords prior to the modulation and spreading operations for that codeword or subsequent to the combining operation for that codeword. For example, the specified processing sequence may comprise the scrambling, modulation, spreading and combining operations performed in that order for at least the given codeword, or the modulation, spreading, combining and scrambling operations performed in that order for at least the given codeword.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: May 26, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Ido Gazit, Shai Kalfon, Eran Goldstein
  • Patent number: 8830966
    Abstract: An apparatus having a database and a circuit is disclosed. The database may be configured to store a plurality of entries. The circuit may be configured to (i) insert a plurality of indicators into a frame, (ii) generate the entries in the database and (iii) transmit the frame in response to the entries such that power is applied to an antenna corresponding to each of a plurality of data items in the frame and no power is applied to the antenna corresponding to each of the indicators in the frame. Each of the entries generally identifies a respective location in the frame. Each of the locations may begin a respective string comprising at least one of the indicators.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: September 9, 2014
    Assignee: LSI Corporation
    Inventors: Shai Kalfon, Ido Gazit
  • Patent number: 8798010
    Abstract: A transmitter comprises resource mapping circuitry configured to map symbols from multiple control channels to transmission symbols in a base station of a wireless system. The resource mapping circuitry comprises a table-based mapper configured to receive the control channel symbols and to map those symbols to the transmission symbols utilizing at least a selected one of a plurality of tables providing respective distinct mappings between the control channel symbols and the transmission symbols. For example, each of the transmission symbols may comprise a plurality of resource groups and the tables may specify distinct mappings of the control channels symbols to resource groups for different sets of possible base station parameter values. In one embodiment, the control channels comprise a physical control format indicator channel (PCFICH), a physical downlink control channel (PDCCH), and a physical hybrid ARQ indicator channel (PHICH) of an LTE cellular system.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: August 5, 2014
    Assignee: LSI Corporation
    Inventors: Shai Kalfon, Eran Goldstein, Ido Gazit, Assaf Pihed
  • Patent number: 8793295
    Abstract: An apparatus including a first circuit and a second circuit. The first circuit may be configured to generate pseudo-random sequences in response to a first m-sequence and a second m-sequence, where the first m-sequence is initialized with a pre-calculated constant and the second m-sequence is initialized based on a pre-defined initial sequence and a table of pre-calculated values indicating which components of the initial sequence participate in initializing the second m-sequence. The second circuit may be configured to store the table of pre-calculated values.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: July 29, 2014
    Assignee: LSI Corporation
    Inventors: Assaf Prihed, Ido Gazit, Shai Kalfon, Sharon Rosenschein
  • Patent number: 8724722
    Abstract: An apparatus including a processor and a radio frequency (RF) interface. The processor may be configured to process downlink information such that a latency of the apparatus is determined by an amount of time involved in processing the downlink information to obtain a single orthogonal frequency division multiplexed (OFDM) symbol for presentation to the RF interface.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: May 13, 2014
    Assignee: LSI Corporation
    Inventors: Ido Gazit, Shai Kalfon, Sharon Rosenschein
  • Patent number: 8605817
    Abstract: Described embodiments provide a wireless communication system that employs modulation and precoding. An input bit stream is divided into one or more batches. Each batch has a consecutive number of bits. A modulation scheme is determined for batches. A precoding scheme for layer mapping is determined for the batches. Based on the modulation scheme and precoding scheme, a look-up table (LUT) is selected. The selected LUT maps the batches into one or more modulated and precoded layers. The modulated and precoded batches are provided to a transmission module.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: December 10, 2013
    Assignee: LSI Corporation
    Inventors: Shai Kalfon, Ido Gazit, Eran Goldstein
  • Publication number: 20130223355
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an estimated power unit table used to store power information in response to one or more of a plurality of input parameters. The second circuit may be configured to individually allocate one or more power usage parameters to each of a plurality of mobile units through a wireless network in response to the parameters stored in said power unit table. The power usage parameters may comprise (i) an absolute power grant when in a first mode and (ii) a relative power grant when in a second mode.
    Type: Application
    Filed: February 29, 2012
    Publication date: August 29, 2013
    Inventor: Ido Gazit
  • Publication number: 20130195021
    Abstract: A transmitter comprises resource mapping circuitry configured to map symbols from multiple control channels to transmission symbols in a base station of a wireless system. The resource mapping circuitry comprises a table-based mapper configured to receive the control channel symbols and to map those symbols to the transmission symbols utilizing at least a selected one of a plurality of tables providing respective distinct mappings between the control channel symbols and the transmission symbols. For example, each of the transmission symbols may comprise a plurality of resource groups and the tables may specify distinct mappings of the control channels symbols to resource groups for different sets of possible base station parameter values. In one embodiment, the control channels comprise a physical control format indicator channel (PCFICH), a physical downlink control channel (PDCCH), and a physical hybrid ARQ indicator channel (PHICH) of an LTE cellular system.
    Type: Application
    Filed: January 31, 2012
    Publication date: August 1, 2013
    Applicant: LSI Corporation
    Inventors: Shai Kalfon, Eran Goldstein, Ido Gazit, Assaf Pihed
  • Publication number: 20130188553
    Abstract: A transmitter comprises indicator channel processing circuitry configured to process indicator channel codewords for transmission in a base station of a wireless system. The indicator channel processing circuitry performs a plurality of processing operations on the indicator channel codewords in a specified processing sequence, with the plurality of processing operations comprising at least modulation, scrambling, spreading and combining. In the specified processing sequence, the scrambling operation is performed for at least a given one of the indicator channel codewords prior to the modulation and spreading operations for that codeword or subsequent to the combining operation for that codeword. For example, the specified processing sequence may comprise the scrambling, modulation, spreading and combining operations performed in that order for at least the given codeword, or the modulation, spreading, combining and scrambling operations performed in that order for at least the given codeword.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 25, 2013
    Applicant: LSI Corporation
    Inventors: Ido Gazit, Shai Kalfon, Eran Goldstein
  • Publication number: 20130182782
    Abstract: In described embodiments, a physical downlink control channel of a device operating in accordance with a 3GPP LTE standard is processed to provide interleaving, modulation and multi-layer mapping and pre-coding. A Resource Element Group interleaver applies interleaving to an input signal representing an input bitstream, and a modulator modulates the input signal. After interleaving and modulating the signal, a multi-layer mapper and pre-coder layer-maps and pre-codes the interleaved and modulated input signal into a plurality of different layers.
    Type: Application
    Filed: January 17, 2012
    Publication date: July 18, 2013
    Inventors: Ido Gazit, Eran Goldstein, Shai Kalfon
  • Publication number: 20130102358
    Abstract: Described embodiments provide a wireless communication system that employs modulation and precoding. An input bit stream is divided into one or more batches. Each batch has a consecutive number of bits. A modulation scheme is determined for batches. A precoding scheme for layer mapping is determined for the batches. Based on the modulation scheme and precoding scheme, a look-up table (LUT) is selected. The selected LUT maps the batches into one or more modulated and precoded layers. The modulated and precoded batches are provided to a transmission module.
    Type: Application
    Filed: October 20, 2011
    Publication date: April 25, 2013
    Inventors: Shai Kalfon, Ido Gazit, Eran Goldstein
  • Publication number: 20130022027
    Abstract: An apparatus having a database and a circuit is disclosed. The database may be configured to store a plurality of entries. The circuit may be configured to (i) insert a plurality of indicators into a frame, (ii) generate the entries in the database and (iii) transmit the frame in response to the entries such that power is applied to an antenna corresponding to each of a plurality of data items in the frame and no power is applied to the antenna corresponding to each of the indicators in the frame. Each of the entries generally identifies a respective location in the frame. Each of the locations may begin a respective string comprising at least one of the indicators.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 24, 2013
    Inventors: Shai Kalfon, Ido Gazit
  • Publication number: 20130024489
    Abstract: An apparatus including a first circuit and a second circuit. The first circuit may be configured to generate pseudo-random sequences in response to a first m-sequence and a second m-sequence, where the first m-sequence is initialized with a pre-calculated constant and the second m-sequence is initialized based on a pre-defined initial sequence and a table of pre-calculated values indicating which components of the initial sequence participate in initializing the second m-sequence. The second circuit may be configured to store the table of pre-calculated values.
    Type: Application
    Filed: July 18, 2011
    Publication date: January 24, 2013
    Inventors: Assaf Prihed, Ido Gazit, Shai Kalfon, Sharon Rosenschein
  • Publication number: 20120327864
    Abstract: An apparatus including a control bit generating module and a control channel mapping module. The control bit generating module may be configured to generate control bits to be carried by at least one control channel. The control channel mapping module may be configured to map at least one control channel to resource element groups. A resource element pointer of the control channel mapping module is generally incremented by a multiple of two on each mapping iteration.
    Type: Application
    Filed: June 23, 2011
    Publication date: December 27, 2012
    Inventor: Ido Gazit
  • Publication number: 20120324195
    Abstract: An apparatus generally having a cache memory and a circuit is disclosed. The circuit may be configured to (i) parse a single first command received from a processor into a first address and a first value and (ii) allocate a first one of a plurality of lines in the cache memory to a buffer in response to the first command. The first line (a) is generally associated with the first address and (b) may have a plurality of first words. The circuit may be further configured to (iii) preset each of the first words in the first line to the first value.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 20, 2012
    Inventors: Alexander Rabinovitch, Eliahou Arviv, Ido Gazit, Leonid Dubrovin
  • Publication number: 20120263246
    Abstract: An apparatus including a processor and a radio frequency (RF) interface. The processor may be configured to process downlink information such that a latency of the apparatus is determined by an amount of time involved in processing the downlink information to obtain a single orthogonal frequency division multiplexed (OFDM) symbol for presentation to the RF interface.
    Type: Application
    Filed: April 14, 2011
    Publication date: October 18, 2012
    Inventors: Ido Gazit, Shai Kalfon, Sharon Rosenschein
  • Publication number: 20100235721
    Abstract: Described embodiments provide for rate matching with an encoded sequence of data bits. The encoded sequence of data bits is divided into two or more sub-blocks, with each sub-block having at least one column of bits, each including a set of valid bits. A set of dummy bits is generated and appended to each column of each sub-block. A starting point index for the set of valid bits within each sub-block is generated and the number of bits supported by the physical layer is determined. Only the valid bits of each sub-block are interleaved, based on each starting point index, until either i) there are no valid bits remaining, or ii) the number of interleaved bits reaches the number of bits supported by the physical layer. All dummy bits and any valid bits exceeding the number of bits supported by the physical layer are omitted.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 16, 2010
    Inventors: Moshe Bukris, Ido Gazit