Abstract: A method for testing wireless tags by a testing unit, comprising: transmitting a signal to energize a plurality of wireless tags within a testing area of the testing unit substantially simultaneously; waiting a prescribed amount of time sufficient to allow all of the wireless tags in the testing area an opportunity to respond with a transmitted message, each transmitted message including a unique identifier of the wireless tag; determining, based on information as to the identity of which wireless tags are in the testing area and receipt, if any, by the tester of the transmitted messages containing respective unique identifiers from the wireless tags in the testing area, which of the plurality of wireless tags are good and which of the plurality of wireless tags are bad.

Abstract: A method for testing wireless tags by a testing unit, comprising: transmitting a signal to energize a plurality of wireless tags within a testing area of the testing unit substantially simultaneously; waiting a prescribed amount of time sufficient to allow all of the wireless tags in the testing area an opportunity to respond with a transmitted message, each transmitted message including a unique identifier of the wireless tag; determining, based on information as to the identity of which wireless tags are in the testing area and receipt, if any, by the tester of the transmitted messages containing respective unique identifiers from the wireless tags in the testing area, which of the plurality of wireless tags are good and which of the plurality of wireless tags are bad.

Abstract: A method for testing a wireless tag by a testing unit. The method comprises: transmitting, by a first antenna, a prescribed patten that is recognizable by a tag to put the tag into a testing mode; transmitting a trigger signal to a tag from a second antenna, the trigger signal being adapted to cause a tag to at least respond with a prescribed signal when the tag is good; waiting up to a prescribed amount of time after transmission of the trigger signal for a response to the trigger signal from a tag that is within range of the second antenna; when a valid response is received from the tag within the prescribed amount of time, designating the tag as having passed the test; and when a valid response is not received from the tag within the prescribed amount of time, designating the tag as having failed the test.

Abstract: A system and method for analyzing power usage of an energy-aware computing system. A method includes monitoring executed machine code on a line-by-line basis; monitoring power consumption of each component of the energy-aware computing system simultaneous to the machine code monitoring; determining at least one routine executed by the energy-aware computing system based on the monitored executed machine code, wherein the at least one routine is a portion of machine code that performs a specific task within a larger set of instructions for the energy-aware computing system; and mapping the power consumption for each determined routine.

Abstract: A system and method for analyzing power usage of an energy-aware computing system. A method includes monitoring executed machine code on a line-by-line basis; monitoring power consumption of each component of the energy-aware computing system simultaneous to the machine code monitoring; determining at least one routine executed by the energy-aware computing system based on the monitored executed machine code, wherein the at least one routine is a portion of machine code that performs a specific task within a larger set of instructions for the energy-aware computing system; and mapping the power consumption for each determined routine.

Abstract: In some examples, a system for modifying circuit can include a processor to detect a previous routed top level circuit design that was proven to close timing within a predetermined range and congestion below a threshold level. The processor can also detect a new pin to be added to a new circuit design and detect user input indicating a bounding box corresponding to a new macro boundary in the previous routed top level circuit design. Additionally, the processor can identify a location of a net in the previous circuit design corresponding to the new pin, wherein the new pin is placed at an intersection between the net and the bounding box. Furthermore, the processor can manufacture a circuit based on the previous circuit design and the placement of the new pin at the intersection between the net and the bounding box.

Abstract: In some examples, a system for modifying circuit can include a processor to detect a previous routed top level circuit design that was proven to close timing within a predetermined range and congestion below a threshold level. The processor can also detect a new pin to be added to a new circuit design and detect user input indicating a bounding box corresponding to a new macro boundary in the previous routed top level circuit design. Additionally, the processor can identify a location of a net in the previous circuit design corresponding to the new pin, wherein the new pin is placed at an intersection between the net and the bounding box. Furthermore, the processor can manufacture a circuit based on the previous circuit design and the placement of the new pin at the intersection between the net and the bounding box.