Abstract: Various embodiments relate to a free running oscillator, that includes a switch capacitor based frequency-to-voltage converter (F2V), a comparator, and a voltage controlled oscillator (VCO), which may be collectively configured to reduce amplifier offset and flicker noise while increasing effective gain of the amplifier of the comparator. The F2V may produce a feedback voltage Vfb corresponding to frequencies of output of the VCO. The comparator may be configured to sample a reference voltage Vref using a sampling capacitor, compare Vref to Vfb, and generate an output based on any difference between Vref and Vfb, where the output may be integrated using an integrating capacitor of the comparator. The comparator may compensate for parasitic capacitance at the output of the amplifier by using an amplifier having two outputs, with the sampling capacitor and integrating capacitor being coupled to respectively different outputs of the amplifier.

Abstract: Various embodiments relate to a free running oscillator, that includes a switch capacitor based frequency-to-voltage converter (F2V), a comparator, and a voltage controlled oscillator (VCO), which may be collectively configured to reduce amplifier offset and flicker noise while increasing effective gain of the amplifier of the comparator. The F2V may produce a feedback voltage Vfb corresponding to frequencies of output of the VCO. The comparator may be configured to sample a reference voltage Vref using a sampling capacitor, compare Vref to Vfb, and generate an output based on any difference between Vref and Vfb, where the output may be integrated using an integrating capacitor of the comparator. The comparator may compensate for parasitic capacitance at the output of the amplifier by using an amplifier having two outputs, with the sampling capacitor and integrating capacitor being coupled to respectively different outputs of the amplifier.

Abstract: Various embodiments relate to a free running oscillator, including: a voltage controlled oscillator circuit including an input configured to receive an input voltage and an output configured to provide an oscillation signal, wherein the input voltage controls a frequency of the oscillation signal; a frequency to voltage circuit including an input configured to receive the oscillation signal and an output configured to produce a voltage dependent on a frequency of the oscillation signal; a comparison circuit including an input and an output comprising: a first amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, wherein the first input received one of a reference voltage and the output of frequency to voltage circuit; a second amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, fir

Abstract: A clock delay circuit includes an output to provide an output clock signal which is a delayed version of an input clock signal. The clock delay circuit includes a latch whose output provides the output clock signal. A delay control circuit provides a third clock signal. The latch includes a first input to receive the input clock signal and a second input to receive the third clock signal. The amount of delay provided by the latch is dependent upon the duty cycle of the third clock signal.

Abstract: A clock delay circuit includes an output to provide an output clock signal which is a delayed version of an input clock signal. The clock delay circuit includes a latch whose output provides the output clock signal. A delay control circuit provides a third clock signal. The latch includes a first input to receive the input clock signal and a second input to receive the third clock signal. The amount of delay provided by the latch is dependent upon the duty cycle of the third clock signal.