Patents by Inventor Ignacio Llamas

Ignacio Llamas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12566607
    Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
    Type: Grant
    Filed: March 5, 2024
    Date of Patent: March 3, 2026
    Assignee: NVIDIA Corporation
    Inventors: Ronald Charles Babich, Jr., John Burgess, Jack Choquette, Tero Karras, Samuli Laine, Ignacio Llamas, Gregory Muthler, William Parsons Newhall, Jr.
  • Publication number: 20260051115
    Abstract: Approaches presented herein provide for the generation of visual content, including different types of content representations from different sources, rendered to include consistent scene illumination for the various representations. A first render pass can produce a first image including only proxies of implicit representations (e.g., NeRF objects) under scene illumination. A second render pass can produce a second image that includes a representation of the explicit scene objects, as well as the proxies of the implicit representations, under the scene illumination, which produces secondary lighting effects. The first and second images are compared to determine irradiance ratio data for the various pixel locations. A third render pass can produce a third image that includes the implicit representations, which can have relighting performed according to the irradiance ratio data to include the secondary lighting effects.
    Type: Application
    Filed: August 25, 2025
    Publication date: February 19, 2026
    Inventors: Nicolas Moenne-Loccoz, Zan Gojcic, Gavriel State, Zian Wang, Ignacio Llamas
  • Patent number: 12400395
    Abstract: Approaches presented herein provide for the generation of visual content, including different types of content representations from different sources, rendered to include consistent scene illumination for the various representations. A first render pass can produce a first image including only proxies of implicit representations (e.g., NeRF objects) under scene illumination. A second render pass can produce a second image that includes a representation of the explicit scene objects, as well as the proxies of the implicit representations, under the scene illumination, which produces secondary lighting effects. The first and second images are compared to determine irradiance ratio data for the various pixel locations. A third render pass can produce a third image that includes the implicit representations, which can have relighting performed according to the irradiance ratio data to include the secondary lighting effects.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: August 26, 2025
    Assignee: Nvidia Corporation
    Inventors: Nicolas Moenne-Loccoz, Zan Gojcic, Gavriel State, Zian Wang, Ignacio Llamas
  • Publication number: 20250118005
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
    Type: Application
    Filed: October 10, 2024
    Publication date: April 10, 2025
    Inventors: Greg MUTHLER, Tero Karras, Samuli Laine, William Parsons Newhall, JR., Ronald Charles Babich, JR., John Burgess, Ignacio Llamas
  • Publication number: 20250104332
    Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
    Type: Application
    Filed: December 6, 2024
    Publication date: March 27, 2025
    Inventors: Samuli LAINE, Timo AILA, Tero KARRAS, Gregory MUTHLER, William P. NEWHALL, JR., Ronald C BABICH, JR., Craig KOLB, Ignacio LLAMAS, John BURGESS
  • Publication number: 20250104334
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
    Type: Application
    Filed: December 6, 2024
    Publication date: March 27, 2025
    Inventors: Samuli Laine, Tero Karras, Greg Muthler, William Parsons Newhall, JR., Ronald Charles Babich, JR., Ignacio LLamas, John Burgess
  • Publication number: 20250022216
    Abstract: In various examples, shader bindings may be recorded in a shader binding table that includes shader records. Geometry of a 3D scene may be instantiated using object instances, and each may be associated with a respective set of the shader records using a location identifier of the set of shader records in memory. The set of shader records may represent shader bindings for an object instance under various predefined conditions. One or more of these predefined conditions may be implicit in the way the shader records are arranged in memory (e.g., indexed by ray type, by sub-geometry, etc.). For example, a section selector value (e.g., a section index) may be computed to locate and select a shader record based at least in part on a result of a ray tracing query (e.g., what sub-geometry was hit, what ray type was traced, etc.).
    Type: Application
    Filed: September 30, 2024
    Publication date: January 16, 2025
    Inventors: Martin Stich, Ignacio Llamas, Steven Parker
  • Patent number: 12198253
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
    Type: Grant
    Filed: August 30, 2023
    Date of Patent: January 14, 2025
    Assignee: NVIDIA Corporation
    Inventors: Samuli Laine, Tero Karras, Greg Muthler, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., Ignacio Llamas, John Burgess
  • Patent number: 12198255
    Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
    Type: Grant
    Filed: September 21, 2023
    Date of Patent: January 14, 2025
    Assignee: NVIDIA CORPORATION
    Inventors: Samuli Laine, Timo Aila, Tero Karras, Gregory Muthler, William P. Newhall, Jr., Ronald C Babich, Jr., Craig Kolb, Ignacio Llamas, John Burgess
  • Publication number: 20250004947
    Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
    Type: Application
    Filed: September 11, 2024
    Publication date: January 2, 2025
    Inventors: Gregory A. MUTHLER, Timo AILA, Tero KARRAS, Samuli LAINE, William Parsons NEWHALL, JR., Ronald Charles BABICH, JR., John BURGESS, Ignacio LLAMAS
  • Patent number: 12148088
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: November 19, 2024
    Assignee: NVIDIA Corporation
    Inventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
  • Patent number: 12124378
    Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: October 22, 2024
    Assignee: NVIDIA Corporation
    Inventors: Gregory A. Muthler, Timo Aila, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
  • Patent number: 12112428
    Abstract: In various examples, shader bindings may be recorded in a shader binding table that includes shader records. Geometry of a 3D scene may be instantiated using object instances, and each may be associated with a respective set of the shader records using a location identifier of the set of shader records in memory. The set of shader records may represent shader bindings for an object instance under various predefined conditions. One or more of these predefined conditions may be implicit in the way the shader records are arranged in memory (e.g., indexed by ray type, by sub-geometry, etc.). For example, a section selector value (e.g., a section index) may be computed to locate and select a shader record based at least in part on a result of a ray tracing query (e.g., what sub-geometry was hit, what ray type was traced, etc.).
    Type: Grant
    Filed: July 17, 2023
    Date of Patent: October 8, 2024
    Assignee: NVIDIA Corporation
    Inventors: Martin Stich, Ignacio Llamas, Steven Parker
  • Publication number: 20240312122
    Abstract: Approaches presented herein provide for the generation of visual content, including different types of content representations from different sources, rendered to include consistent scene illumination for the various representations. A first render pass can produce a first image including only proxies of implicit representations (e.g., NeRF objects) under scene illumination. A second render pass can produce a second image that includes a representation of the explicit scene objects, as well as the proxies of the implicit representations, under the scene illumination, which produces secondary lighting effects. The first and second images are compared to determine irradiance ratio data for the various pixel locations. A third render pass can produce a third image that includes the implicit representations, which can have relighting performed according to the irradiance ratio data to include the secondary lighting effects.
    Type: Application
    Filed: March 15, 2023
    Publication date: September 19, 2024
    Inventors: Nicolas Moenne-Loccoz, Zan Gojcic, Gavriel State, Zian Wang, Ignacio Llamas
  • Publication number: 20240257439
    Abstract: Disclosed approaches may leverage the actual spatial and reflective properties of a virtual environment—such as the size, shape, and orientation of a bidirectional reflectance distribution function (BRDF) lobe of a light path and its position relative to a reflection surface, a virtual screen, and a virtual camera—to produce, for a pixel, an anisotropic kernel filter having dimensions and weights that accurately reflect the spatial characteristics of the virtual environment as well as the reflective properties of the surface. In order to accomplish this, geometry may be computed that corresponds to a projection of a reflection of the BRDF lobe below the surface along a view vector to the pixel. Using this approach, the dimensions of the anisotropic filter kernel may correspond to the BRDF lobe to accurately reflect the spatial characteristics of the virtual environment as well as the reflective properties of the surface.
    Type: Application
    Filed: March 21, 2024
    Publication date: August 1, 2024
    Inventors: Shiqiu Liu, Christopher Ryan Wyman, Jon Hasselgren, Jacob Munkberg, Ignacio Llamas
  • Publication number: 20240211255
    Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
    Type: Application
    Filed: March 5, 2024
    Publication date: June 27, 2024
    Inventors: Ronald Charles BABICH, JR., John BURGESS, Jack CHOQUETTE, Tero KARRAS, Samuli LAINE, Ignacio LLAMAS, Gregory MUTHLER, William Parsons NEWHALL, JR.
  • Patent number: 11966737
    Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: April 23, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Ronald Charles Babich, Jr., John Burgess, Jack Choquette, Tero Karras, Samuli Laine, Ignacio Llamas, Gregory Muthler, William Parsons Newhall, Jr.
  • Patent number: 11941745
    Abstract: Disclosed approaches may leverage the actual spatial and reflective properties of a virtual environment—such as the size, shape, and orientation of a bidirectional reflectance distribution function (BRDF) lobe of a light path and its position relative to a reflection surface, a virtual screen, and a virtual camera—to produce, for a pixel, an anisotropic kernel filter having dimensions and weights that accurately reflect the spatial characteristics of the virtual environment as well as the reflective properties of the surface. In order to accomplish this, geometry may be computed that corresponds to a projection of a reflection of the BRDF lobe below the surface along a view vector to the pixel. Using this approach, the dimensions of the anisotropic filter kernel may correspond to the BRDF lobe to accurately reflect the spatial characteristics of the virtual environment as well as the reflective properties of the surface.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: March 26, 2024
    Assignee: NVIDIA Corporation
    Inventors: Shiqiu Liu, Christopher Ryan Wyman, Jon Hasselgren, Jacob Munkberg, Ignacio Llamas
  • Publication number: 20240013471
    Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Inventors: Samuli LAINE, Timo AILA, Tero KARRAS, Gregory MUTHLER, William P. NEWHALL, JR., Ronald C. BABICH, JR., Craig KOLB, Ignacio LLAMAS, John BURGESS
  • Publication number: 20230410410
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
    Type: Application
    Filed: August 30, 2023
    Publication date: December 21, 2023
    Inventors: Samuli LAINE, Tero KARRAS, Greg MUTHLER, William Parsons Newhall, JR., Ronald Charles BABACH, JR., Ignacio LLAMAS, John BURGESS