Abstract: Disclosed is a dumbbell-shaped resistor structure fabricated in a semiconductor substrate for determining the resistivity of the intrinsic base of a polysilicon base transistor. The structure includes an n-doped base region having two large parts separated by a narrow part, resembling a flattened dumbbell, each of which extends into the substrate. A p-type emitter region extends a distance into a portion of the narrow and the second large parts of the base region. An n-type reach-through region extends from the emitter region through the base region electrically isolating a portion of the narrow and second large parts of the base region from the remainder of the base region and forming an electrically continuous p-type path between the first large part of the base region and the portion of the second large part within the reach-through region.

Abstract: A method for making both shallow and deep recessed oxide isolation trenches in silicon semiconductor substrates. A semiconductor substrate is reactively ion etched through mask apertures defining the deep trench areas and at least the perimeters of the shallow trench areas, the etched trenches are oxidized and partially filled with chemical-vapor-deposited (CVD) oxide. The filling of the trenches is completed with polycrystalline silicon. The excess polycrystalline silicon covering substrate areas other than the deep trench areas is removed down to the underlying CVD oxide.The shallow trench areas are etched next, some of the shallow trench areas connecting with the upper regions of the deep trench areas. The monocrystalline and polycrystalline silicon in the respective shallow trench areas are removed and the remaining silicon is thermally oxidized.

Abstract: A method for making ion implanted resistors in conjunction with transistors and other devices within an integrated circuit semiconductor substrate. The implantation of the resistors is done after a predeposition diffusion of the base region of the transistors but prior to the base drive-in step. The subsequent emitter thermal diffusion, or annealing step in the case of ion implanted emitters, consitutes the annealing step for the ion implanted resistor regions.

Abstract: In the fabrication of integrated circuits, a method is provided for forming recessed silicon dioxide isolation in integrated circuits in which the "bird's beak" problems associated with conventional silicon dioxide-silicon nitride composite masking structures is minimized. A conventional composite mask comprising a bottom layer of silicon dioxide and an upper layer of silicon nitride having a plurality of openings defining the regions in the silicon substrate which are to be thermally oxidized is formed on a silicon substrate. Recesses are then etched in the silicon substrate in registration with the openings in the composite mask. Then, the silicon dioxide layer is, in effect, over-etched to extend the openings in the silicon dioxide to greater lateral dimensions than the openings in the silicon nitride layer whereby the silicon nitride at the periphery of the openings is undercut.A layer of silicon is then deposited in the recesses covering the undercut portions of said silicon nitride layer.