Patents by Inventor Igor Ivanovich Blednov
Igor Ivanovich Blednov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10110178Abstract: In a system comprising a plurality of gain elements configured in parallel to one another, a harmonically tuned filter provides an isolation circuit to prevent odd-mode differential oscillations. A harmonically tuned filter comprises resistors, inductors, and capacitors (RLC) to selectively allow one or more specific harmonics to pass through the isolation circuit to suppress the odd-mode oscillation. Direct current (DC) and other non-harmonically-related frequencies do not pass through the isolation circuit. Since the resistor is used to dissipate specifically the energy of the harmonic frequencies causing the odd-mode oscillation, the current density through the resistor is much lower than the current density of a typical odd-mode resistor without a harmonically tuned filter.Type: GrantFiled: November 21, 2014Date of Patent: October 23, 2018Assignee: NXP USA, INC.Inventors: Kevin Kim, Igor Ivanovich Blednov, Olivier Lembeye, Pascal Peyrot
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Patent number: 9659847Abstract: A semiconductor die comprising a terminal structure for an active power device. The terminal structure comprises a metallic layer arranged to be electrically coupled between the active power device and an external contact of an integrated circuit package, a conductive sub-structure extending in parallel with the metallic layer, and located such that, when mounted within an integrated circuit device, the conductive sub-structure lies between the metallic layer and a reference voltage plane, and interconnecting elements extending between the metallic layer and the conductive sub-structure and electrically coupling the metallic layer to the conductive sub-structure.Type: GrantFiled: February 18, 2016Date of Patent: May 23, 2017Assignee: NXP USA, INC.Inventor: Igor Ivanovich Blednov
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Publication number: 20170084524Abstract: A semiconductor die comprising a terminal structure for an active power device. The terminal structure comprises a metallic layer arranged to be electrically coupled between the active power device and an external contact of an integrated circuit package, a conductive sub-structure extending in parallel with the metallic layer, and located such that, when mounted within an integrated circuit device, the conductive sub-structure lies between the metallic layer and a reference voltage plane, and interconnecting elements extending between the metallic layer and the conductive sub-structure and electrically coupling the metallic layer to the conductive sub-structure.Type: ApplicationFiled: February 18, 2016Publication date: March 23, 2017Inventor: Igor Ivanovich BLEDNOV
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Patent number: 9503030Abstract: A radio frequency power amplifier comprises an input and output terminals, a main and peak amplifier stages, and an output power combiner for combining a main output signal and a peak output signal into an output signal. The output power combiner comprises a first combiner terminal electrically coupled to a main output terminal, a second combiner terminal electrically coupled to a peak output terminal, a first transition structure extending from the first combiner terminal in a first direction to a first end, a second transition structure extending from the second combiner terminal in the first direction to a second end, a first electrical conductor arranged between the first and the second ends, and a second electrical conductor arranged between the second combiner terminal and the output terminal. The first electrical conductor extends in a second direction perpendicular to the first direction. The second electrical conductor extends in the first direction.Type: GrantFiled: March 17, 2015Date of Patent: November 22, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventor: Igor Ivanovich Blednov
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Patent number: 9438191Abstract: An RF power amplifier circuit has an input terminal for receiving an input signal having an input power, and an output terminal for outputting an output signal. The RF power amplifier circuit comprises three amplifier stages and an input power splitter for providing respective power fraction signals to respective inputs of each amplifier stage. The input power splitter comprises a first input transmission line arranged between a first node and a second node, a second input transmission line arranged between a third node and a fourth node, and an electrical reactive element having a first terminal electrically connected to both the first and the second nodes, and a second terminal electrically coupled to a third one of the respective three inputs.Type: GrantFiled: October 15, 2014Date of Patent: September 6, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventor: Igor Ivanovich Blednov
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Patent number: 9401682Abstract: A RF power amplifier module comprises a die with a RF power transistor and the RF power transistor comprises a control terminal, a transistor output terminal and a transistor reference terminal. The RF power amplifier module further comprises a module input terminal, a module output terminal and at least two module reference terminals being electrically coupled to the control terminal, the transistor output terminal and the transistor reference terminal, respectively. The RF power amplifier module further comprises an electrically isolating layer and a heat conducting element. The die is in thermal contact with the heat conducting element via the electrically isolating layer in order to transfer heat during operation of the RF power transistor to the heat conducting element.Type: GrantFiled: September 18, 2014Date of Patent: July 26, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Igor Ivanovich Blednov, Jeffrey K. Jones, Youri Volokhine
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Publication number: 20160112012Abstract: A radio frequency power amplifier comprises an input and output terminals, a main and peak amplifier stages, and an output power combiner for combining a main output signal and a peak output signal into an output signal. The output power combiner comprises a first combiner terminal electrically coupled to a main output terminal, a second combiner terminal electrically coupled to a peak output terminal, a first transition structure extending from the first combiner terminal in a first direction to a first end, a second transition structure extending from the second combiner terminal in the first direction to a second end, a first electrical conductor arranged between the first and the second ends, and a second electrical conductor arranged between the second combiner terminal and the output terminal. The first electrical conductor extends in a second direction perpendicular to the first direction. The second electrical conductor extends in the first direction.Type: ApplicationFiled: March 17, 2015Publication date: April 21, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventor: IGOR IVANOVICH BLEDNOV
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Publication number: 20160056765Abstract: In a system comprising a plurality of gain elements configured in parallel to one another, a harmonically tuned filter provides an isolation circuit to prevent odd-mode differential oscillations. A harmonically tuned filter comprises resistors, inductors, and capacitors (RLC) to selectively allow one or more specific harmonics to pass through the isolation circuit to suppress the odd-mode oscillation. Direct current (DC) and other non-harmonically-related frequencies do not pass through the isolation circuit. Since the resistor is used to dissipate specifically the energy of the harmonic frequencies causing the odd-mode oscillation, the current density through the resistor is much lower than the current density of a typical odd-mode resistor without a harmonically tuned filter.Type: ApplicationFiled: November 21, 2014Publication date: February 25, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Kevin Kim, Igor Ivanovich Blednov, Olivier Lembeye, Pascal Peyrot
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Publication number: 20150333706Abstract: An RF power amplifier circuit has an input terminal for receiving an input signal having an input power, and an output terminal for outputting an output signal. The RF power amplifier circuit comprises three amplifier stages and an input power splitter for providing respective power fraction signals to respective inputs of each amplifier stage. The input power splitter comprises a first input transmission line arranged between a first node and a second node, a second input transmission line arranged between a third node and a fourth node, and an electrical reactive element having a first terminal electrically connected to both the first and the second nodes, and a second terminal electrically coupled to a third one of the respective three inputs.Type: ApplicationFiled: October 15, 2014Publication date: November 19, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventor: IGOR IVANOVICH BLEDNOV
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Publication number: 20150303881Abstract: A RF power amplifier module comprises a die with a RF power transistor and the RF power transistor comprises a control terminal, a transistor output terminal and a transistor reference terminal. The RF power amplifier module further comprises a module input terminal, a module output terminal and at least two module reference terminals being electrically coupled to the control terminal, the transistor output terminal and the transistor reference terminal, respectively. The RF power amplifier module further comprises an electrically isolating layer and a heat conducting element. The die is in thermal contact with the heat conducting element via the electrically isolating layer in order to transfer heat during operation of the RF power transistor to the heat conducting element.Type: ApplicationFiled: September 18, 2014Publication date: October 22, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: IGOR IVANOVICH BLEDNOV, JEFFREY K. JONES, YOURI VOLOKHINE
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Patent number: 7443264Abstract: The present invention relates to an impedance transformation circuit (I10; 11a; 11b; 12) with a first contact pad (51) and a second contact pad (52) being spaced-apart and formed on a substrate (20). The impedance transformation circuit comprises at least first circuit element (40) providing a contact area (41) formed on the substrate (20) which is arranged adjacent and between the first (51) and the second (52) contact pad. A first wire element (31) extends over the substrate (20) connecting the first contact pad (51) and a first end portion (41a) of the contact area of the first circuit element (40), whilst at least a second wire element (32) extends over the substrate (20) connecting the second contact pad (52) and a second end portion (41b) of the contact area of the first circuit element (40). The contact area of the first circuit element (40) is shaped such that it is provided a capacitive connection with a predetermined capacitance between the contact area and a fixed reference poteitial.Type: GrantFiled: July 13, 2004Date of Patent: October 28, 2008Assignee: NXP B.V.Inventor: Igor Ivanovich Blednov
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Publication number: 20080055015Abstract: The present invention relates to an impedance transformation circuit (I10; 11 a; 11 b; 12) with a first contact pad (51) and a second contact pad (52) being spaced-apart and formed on a substrate (20). The impedance transformation circuit comprises at least first circuit element (40) providing a contact area (41) formed on the substrate (20) which is arranged adjacent and between the first (51) and the second (52) contact pad. A first ‘wire element (31) extends over the substrate (20) connecting the first contact pad (51) and a first end portion (41 a) of the contact area of the first circuit element (40), whilst at least a second wire element (32) extends over the substrate (20) connecting the second contact pad (52) and a second end portion (41b) of the contact area of the first circuit element (40). The contact area of the first circuit element (40) is shaped such that it is provided a capacitive connection with a predetermined capacitance between the contact area and a fixed reference poteitial.Type: ApplicationFiled: July 13, 2004Publication date: March 6, 2008Inventor: Igor Ivanovich Blednov
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Patent number: 7332961Abstract: A method for a predistortion linearization of a branched signal for a RF amplifier, comprising supplying a branched signal to at least one input terminal (2); distributing power of the input signal present on at least one input terminal (2) to a plurality of parallel branch-circuits (16, 18, 20) as a branched signals by a power distributing circuit (4); controlling a phase parameter and an amplitude parameter of the branched signals by at least one nonlinear branch-circuit (18, 20); controlling a phase parameter and an amplitude parameter of the branched signals by at least one linear branch-circuit (16); combining output branched signals of at least one nonlinear branch circuit (18, 20) with the output branched signals of at least one linear branch circuit (16) by a power combining circuit (12); providing an output branched signal of the power combining circuit (12) on at least one output terminal (14).Type: GrantFiled: October 17, 2003Date of Patent: February 19, 2008Assignee: NXP B.V.Inventor: Igor Ivanovich Blednov
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Patent number: 7138872Abstract: The power amplifier device comprises one or more transistors (16) with an output electrode and on top of that a thin-film capacitor. The capacitor comprises a first conductive layer (18), that is also the output terminal of the transistor. It further comprises a first dielectric layer (20) and a second conductive layer (22), that is connected by at least one first connecting wire (30) to said first conductive layer (18). A second connecting wire (34) connects said second conductive layer (22) to an output terminal of the power amplification device (40). In this manner a parallel LC circuit is created, and it is designed such that said parallel LC circuit shows resonance at a harmonic of a frequency (2Fo, 3Fo, 4Fo, 5Fo and so on) amplified by said power amplifier.Type: GrantFiled: March 20, 2003Date of Patent: November 21, 2006Assignee: Koninklijke Philips Electronics N.V.Inventor: Igor Ivanovich Blednov
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Patent number: 7119623Abstract: An output circuit for a semiconductor amplifier element having an output capacitance (20, 42) that is to be cancelled by a first LC circuit having a first inductance (22, 44) and a first capacitance (24, 46), said output circuit comprising an additional inductance circuit with an additional inductance (30, 52) and an additional capacitance (32, 54), said first inductance circuit and said additional inductance circuit compensating for the output capacitance (20, 42) of the semiconductor amplifier element, while the first inductance (22, 44) and the first capacitance (24, 46) cancel out the second harmonics within the output signal of the semiconductor amplifier element.Type: GrantFiled: January 30, 2003Date of Patent: October 10, 2006Assignee: Koninklijke Philips Electronics N.V.Inventors: Igor Ivanovich Blednov, Alle Kornelis Vennema
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Patent number: 7078976Abstract: A high power Doherty amplifier circuit having at least one input terminal and at least one output terminal comprising at least one carrier transistor (30) forming a main amplifier stage; at least one peak transistor (32) forming a peak amplifier stage; a first input line (27) connecting the input terminal (28) to an input (29) of the carrier transistor (30); a second input line (31) connecting the input terminal (28) to an input (63) of the peak transistor (32); a first output line (33) connecting the output terminal (56) to an output (49) of the carrier transistor (30); and a second output line (35) connecting the output terminal (56) to an output (75) of the peak transistor (32).Type: GrantFiled: July 18, 2003Date of Patent: July 18, 2006Assignee: Koninklijke Philips Electronics N.V.Inventor: Igor Ivanovich Blednov