Patents by Inventor Igor PAVLOV

Igor PAVLOV has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230138924
    Abstract: A temperature stabilization technique for a digital-to-analog converter (DAC). The DAC is kept operating while a load, for example an analog computer, is disconnected from the DAC in order to reduce temperature changes that otherwise occur when the DAC is idle. The DAC may be supplied with adjusted input to compensate for changes in dissipation caused by the removal of the load.
    Type: Application
    Filed: October 3, 2022
    Publication date: May 4, 2023
    Inventor: Igor Pavlov
  • Patent number: 10592298
    Abstract: A system and method for processing a data packet. The method comprises initiating processing of a received plurality of data packets by CPU cores; tracking, by a scale management routine, processing queues for the CPU cores and their load. In response to an average size of a processing queue being lower than a first pre-determined queue threshold, and a CPU core load being lower than a first pre-determined load threshold, preventing adding new data packets to the processing queue, monitoring emptying of processing queues for each processing CPU core. In response to an average size of a processing queue or a CPU core load being above a second pre-determined upper queue threshold or the second pre-determined load threshold, transmitting all data from processing queues for each processing CPU core to a memory buffer, increasing the number of processing cores by one; and initiating data packet processing.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: March 17, 2020
    Assignee: NFWARE, INC.
    Inventors: Alexander Britkin, Viacheslav Morozov, Igor Pavlov
  • Patent number: 10425332
    Abstract: A method of processing data packets, the method executable by a router. The method comprises receiving an indication of a UDP port number associated with a port used by a DNS server and a session duration for the port; receiving a UDP packet; in response to a destination port of the UDP packet matching the DNS port number, sending by a NAT component of the router, the UDP packet to an ALG DNS handler of the router. The method further comprises analyzing, by the ALG DNS handler, a payload length of the at least one UDP packet and verifying whether the UDP packet meets a processing condition. The method further comprises determining a DNS packet type.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: September 24, 2019
    Assignee: NFWARE, INC.
    Inventors: Pavel Ivashchenko, Igor Pavlov
  • Publication number: 20190207850
    Abstract: A method of processing data packets, the method executable by a router. The method comprises receiving an indication of a UDP port number associated with a port used by a DNS server and a session duration for the port; receiving a UDP packet; in response to a destination port of the UDP packet matching the DNS port number, sending by a NAT component of the router, the UDP packet to an ALG DNS handler of the router. The method further comprises analyzing, by the ALG DNS handler, a payload length of the at least one UDP packet and verifying whether the UDP packet meets a processing condition. The method further comprises determining a DNS packet type.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventors: Pavel IVASHCHENKO, Igor PAVLOV
  • Publication number: 20190108068
    Abstract: A system and method for processing a data packet. The method comprises initiating processing of a received plurality of data packets by CPU cores; tracking, by a scale management routine, processing queues for the CPU cores and their load. In response to an average size of a processing queue being lower than a first pre-determined queue threshold, and a CPU core load being lower than a first pre-determined load threshold, preventing adding new data packets to the processing queue, monitoring emptying of processing queues for each processing CPU core. In response to an average size of a processing queue or a CPU core load being above a second pre-determined upper queue threshold or the second pre-determined load threshold, transmitting all data from processing queues for each processing CPU core to a memory buffer, increasing the number of processing cores by one; and initiating data packet processing.
    Type: Application
    Filed: January 26, 2018
    Publication date: April 11, 2019
    Inventors: Alexander BRITKIN, Viacheslav MOROZOV, Igor PAVLOV