Abstract: In a general aspect, a hybrid memory system with cache management is disclosed. In some aspects, a memory module includes volatile memory, non-volatile memory, and an internal cache. The internal cache is communicably coupled with the volatile memory and the non-volatile memory. Whether to execute a memory access request is determined by operation of the memory module. In response to the inability of the memory access request to be executed, a data transferring process is performed to copy data between the volatile memory and the non-volatile memory via the internal cache.

Abstract: In a general aspect, a hybrid memory system with cache management is disclosed. In some aspects, a memory module includes volatile memory, non-volatile memory, and an internal cache. The internal cache is communicably coupled with the volatile memory and the non-volatile memory. Whether to execute a memory access request is determined by operation of the memory module. In response to the inability of the memory access request to be executed, a data transferring process is performed to copy data between the volatile memory and the non-volatile memory via the internal cache.

Abstract: In a general aspect, a hybrid memory system with cache management is disclosed. In some aspects, a memory access request is transmitted by operation of a host memory controller to a memory module via a memory interface. Whether to execute the memory access request is determined by operation of the memory module according to one or more specifications of the memory interface. In response to determining the memory access request cannot be executed according to the one or more specifications of the memory interface, the host memory controller is notified by the memory module and halted. Respective actions are performed by operation of the memory module based on the memory access request and a type of the memory module.

Abstract: In a general aspect, a hybrid memory system with cache management is disclosed. In some aspects, a memory access request is transmitted by operation of a host memory controller to a memory module via a memory interface. Whether to execute the memory access request is determined by operation of the memory module according to one or more specifications of the memory interface. In response to determining the memory access request cannot be executed according to the one or more specifications of the memory interface, the host memory controller is notified by the memory module and halted. Respective actions are performed by operation of the memory module based on the memory access request and a type of the memory module.

Abstract: Techniques are disclosed relating to storing translations in memory that are usable to access data on a recording medium. In one embodiment, a request is sent for a memory allocation within a non-pageable portion of a memory in a computer system. Responsive to the request, allocated memory is received. Translations usable to map logical addresses to physical addresses within a storage device are stored within the allocated memory. In some embodiments, the translations are usable to access an area within the storage device used to store pages evicted from the memory. In one embodiment, a size of the memory allocation is determined based on a size of the area. In another embodiment, a size of the memory allocation is determined based on a size of a partition including the area. In some embodiments, the storage device is a solid-state storage array.

Abstract: Techniques are disclosed relating to storing translations in memory that are usable to access data on a recording medium. In one embodiment, a request is sent for a memory allocation within a non-pageable portion of a memory in a computer system. Responsive to the request, allocated memory is received. Translations usable to map logical addresses to physical addresses within a storage device are stored within the allocated memory. In some embodiments, the translations are usable to access an area within the storage device used to store pages evicted from the memory. In one embodiment, a size of the memory allocation is determined based on a size of the area. In another embodiment, a size of the memory allocation is determined based on a size of a partition including the area. In some embodiments, the storage device is a solid-state storage array.