Abstract: High-voltage level-shifter architectures that provide galvanic coupling between low/high-voltage domains while simultaneously enabling high speed operation, low static current consumption and high reliability under a myriad of environmental circumstances including electromagnetic interference as well as process, voltage and temperature variations.

Abstract: High-voltage level-shifter architectures that provide galvanic coupling between low/high-voltage domains while simultaneously enabling high speed operation, low static current consumption and high reliability under a myriad of environmental circumstances including electromagnetic interference as well as process, voltage and temperature variations.

Abstract: An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage may be arranged in a multi-stage noise shaping architecture (MASH) architecture.

Abstract: An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage may be arranged in a multi-stage noise shaping architecture (MASH) architecture.

Abstract: Representative implementations of devices and techniques provide configurable multi-channel analog-to-digital conversion. In a multi-channel analog-to-digital converter (ADC), one or more ADC stages may be operatively coupled to a different ADC in each of various operating modes.

Abstract: Representative implementations of devices and techniques provide configurable multi-channel analog-to-digital conversion. In a multi-channel analog-to-digital converter (ADC), one or more ADC stages may be operatively coupled to a different ADC in each of various operating modes.

Abstract: This disclosure relates to a Phase-Locked Loop (PLL) device and a method for providing a stable free-running voltage signal to a voltage controlled oscillator.

Abstract: This disclosure relates to a Phase-Locked Loop (PLL) device and a method for providing a stable free-running voltage signal to a voltage controlled oscillator.

Abstract: An apparatus described herein is an LC tank circuit that may include a capacitance, a first inductance, and a second inductance. The first inductance and the second inductance may each be center tapped coils.

Abstract: A filter device is disclosed that includes a switched capacitor circuit.

Abstract: A filter device is disclosed that includes a switched capacitor circuit.

Abstract: Implementations are presented herein that relate to an oscillator circuit.

Abstract: A PLL circuit is provided that comprises a frequency divider that generates a divided frequency signal and a phase frequency detector that receives the divided frequency signal and a reference frequency signal and that is arranged for outputting a first signal for increasing the frequency of an output signal and a second signal for decreasing the frequency of the output signal. Further, there is provided a signal modification unit that receives the first and second signals and that comprises a pulse selector selecting a signal pulse in one of the first and second signals, and a pulse generator for generating a signal pulse simultaneously with the selected signal pulse and adding the generated signal pulse to the other one of the first and second signals.