Patents by Inventor Igor ZIPER

Igor ZIPER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12670092
    Abstract: In some implementations, a controller may identify a block of a memory device that is scheduled for an erase operation. The controller may determine, using a machine learning model or a data structure, whether a wordline of the block is susceptible to a deeper erase condition before the erase operation. The data structure identifies wordlines that are susceptible to deeper erase conditions. The controller may perform a programming operation, on the wordline, to program a predetermined bit pattern on the wordline based on the wordline being susceptible to the deeper erase condition. The controller may perform the erase operation on the block after performing the programming operation.
    Type: Grant
    Filed: June 22, 2024
    Date of Patent: June 30, 2026
    Assignee: Microchip Technology Incorporated
    Inventors: Pitamber Shukla, Igor Ziper, Chris Norrie, Srinivas Yelisetti
  • Patent number: 12632359
    Abstract: In some implementations, a controller may perform, on one or more wordlines of a block of a non-volatile memory device, read operations using default threshold voltages associated with two overlapped charge states. The controller may determine, using a machine learning model, a distribution of threshold voltages for the two overlapped charge states based on read errors associated with the threshold voltages. The controller may determine, based on the determined distribution of threshold voltages, a health of the block. The controller may perform a block refresh operation for the block based on the health of the block. The block refresh operation may be performed when the health satisfies a health threshold. The block refresh operation may not be performed when the health does not satisfy the health threshold.
    Type: Grant
    Filed: June 7, 2024
    Date of Patent: May 19, 2026
    Assignee: Microchip Technology Incorporated
    Inventors: Pitamber Shukla, Chris Norrie, Igor Ziper, Srinivas Yelisetti
  • Publication number: 20250181497
    Abstract: In some implementations, a controller may identify a block of a memory device that is scheduled for an erase operation. The controller may determine, using a machine learning model or a data structure, whether a wordline of the block is susceptible to a deeper erase condition before the erase operation. The data structure identifies wordlines that are susceptible to deeper erase conditions. The controller may perform a programming operation, on the wordline, to program a predetermined bit pattern on the wordline based on the wordline being susceptible to the deeper erase condition. The controller may perform the erase operation on the block after performing the programming operation.
    Type: Application
    Filed: June 22, 2024
    Publication date: June 5, 2025
    Inventors: Pitamber SHUKLA, Igor ZIPER, Chris NORRIE, Srinivas YELISETTI
  • Publication number: 20250173236
    Abstract: In some implementations, a controller may perform, on one or more wordlines of a block of a non-volatile memory device, read operations using default threshold voltages associated with two overlapped charge states. The controller may determine, using a machine learning model, a distribution of threshold voltages for the two overlapped charge states based on read errors associated with the threshold voltages. The controller may determine, based on the determined distribution of threshold voltages, a health of the block. The controller may perform a block refresh operation for the block based on the health of the block. The block refresh operation may be performed when the health satisfies a health threshold. The block refresh operation may not be performed when the health does not satisfy the health threshold.
    Type: Application
    Filed: June 7, 2024
    Publication date: May 29, 2025
    Inventors: Pitamber SHUKLA, Chris NORRIE, Igor ZIPER, Srinivas YELISETTI
  • Publication number: 20250165397
    Abstract: A controller may determine, using a machine learning model, reliability characteristic data associated with memory cells of a non-volatile memory device. The machine learning model may be trained using characterization data that identifies different reliability characteristic of one or more non-volatile memory devices. The controller may group, based on the reliability characteristic data, a first portion of the memory cells of the non-volatile memory device in a first management group, and a second portion of the memory cells of the non-volatile memory device in a second management group. The controller may manage, based on the reliability characteristic data, background scanning and logical to physical mapping of the first management group of memory cells, and the second management group of memory cells.
    Type: Application
    Filed: May 31, 2024
    Publication date: May 22, 2025
    Inventors: Pitamber SHUKLA, Chris NORRIE, Igor ZIPER, Srinivas YELISETTI
  • Publication number: 20250165148
    Abstract: A controller, of a solid state drive (SSD), may perform, on one or more blocks of a non-volatile memory device of the SSD, read operations using pre-determined threshold voltages associated with two overlapped charge states. The read operations may be performed after a power-on condition following a power-off condition on the non-volatile memory device. The controller may determine, using a machine learning model, a change in threshold voltages associated with the two overlapped charge states, after the power-off condition. The machine learning model may determine the change in threshold voltages using bit error rates associated with the read operations. The machine learning model may be trained to determine changes in threshold voltages for the two overlapped charge states, after power-off conditions. The controller may determine adjusted threshold voltages associated with the two overlapped charge states based on the change in threshold voltages.
    Type: Application
    Filed: March 29, 2024
    Publication date: May 22, 2025
    Inventors: Pitamber SHUKLA, Chris NORRIE, Igor ZIPER
  • Publication number: 20250165816
    Abstract: In some implementations, a controller may receive a request for an inference. The controller may determine, based on the received request for the inference, a first inference model of a plurality of inference models, to generate the inference. The controller may obtain, from a memory associated with an inference cache, first attribute data regarding first attributes of the first inference model. A location of the first attribute data, in the memory, may be determined using the inference cache. The attributes may include weights associated with the first inference model, biases associated with the first inference model, and a structure of the first inference model. The controller may utilize the first attribute data to generate the inference based on the request.
    Type: Application
    Filed: June 18, 2024
    Publication date: May 22, 2025
    Inventors: Chris NORRIE, Igor ZIPER, Pitamber SHUKLA